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Message-ID: <3974d438-89ca-04e2-03cd-6d3946dd461e@163.com>
Date: Wed, 17 May 2017 14:31:44 +0800
From: Kever Yang <ellisys@....com>
To: Frank Wang <frank.wang@...k-chips.com>, heiko@...ech.de,
robh+dt@...nel.org, mark.rutland@....com, linux@...linux.org.uk
Cc: huangtao@...k-chips.com, devicetree@...r.kernel.org,
charles.chen@...k-chips.com, wmc@...k-chips.com,
kevan.lan@...k-chips.com, linux-kernel@...r.kernel.org,
sugar.zhang@...k-chips.com, linux-rockchip@...ts.infradead.org,
cody.xie@...k-chips.com, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 2/3] arm: dts: rk322x: correct uart2 pinctrl and add
another sets
Hi Frank,
On 05/17/2017 11:40 AM, Frank Wang wrote:
> Correct UART2 PINCTRL flag and add another PINCTRL sets for UART2
> in case of confict with SDMMC.
>
> Signed-off-by: Frank Wang <frank.wang@...k-chips.com>
> ---
> arch/arm/boot/dts/rk322x.dtsi | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
> index cc6a27d..ea1239a 100644
> --- a/arch/arm/boot/dts/rk322x.dtsi
> +++ b/arch/arm/boot/dts/rk322x.dtsi
> @@ -222,7 +222,7 @@
> clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
> clock-names = "baudclk", "apb_pclk";
> pinctrl-names = "default";
> - pinctrl-0 = <&uart2_xfer>;
> + pinctrl-0 = <&uart21_xfer>;
There are more than one group of UART in rk322x, maybe we need to move
or add this setting in the dts file to override dtsi setting?
Thanks,
- Kever
> reg-shift = <2>;
> reg-io-width = <4>;
> status = "disabled";
> @@ -693,7 +693,7 @@
>
> uart2 {
> uart2_xfer: uart2-xfer {
> - rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_none>,
> + rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_up>,
> <1 19 RK_FUNC_2 &pcfg_pull_none>;
> };
>
> @@ -705,5 +705,12 @@
> rockchip,pins = <0 24 RK_FUNC_1 &pcfg_pull_none>;
> };
> };
> +
> + uart2-1 {
> + uart21_xfer: uart21-xfer {
> + rockchip,pins = <1 10 RK_FUNC_2 &pcfg_pull_up>,
> + <1 9 RK_FUNC_2 &pcfg_pull_none>;
> + };
> + };
> };
> };
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