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Message-ID: <1784310.zJGRWASetU@diego>
Date: Wed, 17 May 2017 10:09:37 +0200
From: Heiko Stübner <heiko@...ech.de>
To: Elaine Zhang <zhangqing@...k-chips.com>
Cc: xf@...k-chips.com, linux-clk@...r.kernel.org,
huangtao@...k-chips.com, xxx@...k-chips.com, cl@...k-chips.com,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
robh+dt@...nel.org, mark.rutland@....com, mturquette@...libre.com,
sboyd@...eaurora.org, zhengxing@...k-chips.com
Subject: Re: [PATCH v1 2/3] dt-bindings: add bindings for rk312x clock controller
Hi Elaine.
Am Mittwoch, 17. Mai 2017, 15:49:21 CEST schrieb Elaine Zhang:
> Add devicetree bindings for Rockchip cru which found on
> Rockchip SoCs.
>
> Signed-off-by: Elaine Zhang <zhangqing@...k-chips.com>
> ---
> .../bindings/clock/rockchip,rk312x-cru.txt | 56
please no placeholders in dt-things. So while rk312x may be ok on the driver
side, it is not for devicetree things and especially compatible properties.
I haven't even found out for which soc this is, so if it's for the rk3128 for
example, please just name it accordingly.
So ideally, just name _everything_ (compatible, dt-header file, driver,
everything) after the first soc it should support and we'll see later on, if it
matches for other socs as well.
Thanks
Heiko
> ++++++++++++++++++++++ 1 file changed, 56 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/clock/rockchip,rk312x-cru.txt
>
> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk312x-cru.txt
> b/Documentation/devicetree/bindings/clock/rockchip,rk312x-cru.txt new file
> mode 100644
> index 000000000000..4a862fe9bea3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/rockchip,rk312x-cru.txt
> @@ -0,0 +1,56 @@
> +* Rockchip RK312X Clock and Reset Unit
> +
> +The RK312X clock controller generates and supplies clock to various
> +controllers within the SoC and also implements a reset controller for SoC
> +peripherals.
> +
> +Required Properties:
> +
> +- compatible: should be "rockchip,rk312x-cru"
> +- reg: physical base address of the controller and length of memory mapped
> + region.
> +- #clock-cells: should be 1.
> +- #reset-cells: should be 1.
> +
> +Optional Properties:
> +
> +- rockchip,grf: phandle to the syscon managing the "general register files"
> + If missing pll rates are not changeable, due to the missing pll lock
> status. +
> +Each clock is assigned an identifier and client nodes can use this
> identifier +to specify the clock which they consume. All available clocks
> are defined as +preprocessor macros in the dt-bindings/clock/rk312x-cru.h
> headers and can be +used in device tree sources. Similar macros exist for
> the reset sources in +these files.
> +
> +External clocks:
> +
> +There are several clocks that are generated outside the SoC. It is expected
> +that they are defined using standard clock bindings with following
> +clock-output-names:
> + - "xin24m" - crystal input - required,
> + - "ext_i2s" - external I2S clock - optional,
> + - "gmac_clkin" - external GMAC clock - optional
> +
> +Example: Clock controller node:
> +
> + cru: cru@...00000 {
> + compatible = "rockchip,rk312x-cru";
> + reg = <0x20000000 0x1000>;
> + rockchip,grf = <&grf>;
> +
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + };
> +
> +Example: UART controller node that consumes the clock generated by the
> clock + controller:
> +
> +uart2: serial@...68000 {
> + compatible = "rockchip,serial";
> + reg = <0x20068000 0x100>;
> + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <24000000>;
> + clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
> + clock-names = "sclk_uart", "pclk_uart";
> + };
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