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Message-Id: <1495016177-2413-2-git-send-email-frank.wang@rock-chips.com>
Date: Wed, 17 May 2017 18:16:14 +0800
From: Frank Wang <frank.wang@...k-chips.com>
To: heiko@...ech.de, robh+dt@...nel.org, mark.rutland@....com,
linux@...linux.org.uk, mturquette@...libre.com,
sboyd@...eaurora.org, rjw@...ysocki.net, viresh.kumar@...aro.org,
rui.zhang@...el.com, edubezval@...il.com
Cc: linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
linux-clk@...r.kernel.org, charles.chen@...k-chips.com,
cody.xie@...k-chips.com, kevan.lan@...k-chips.com,
huangtao@...k-chips.com, rocky.hao@...k-chips.com,
finley.xiao@...k-chips.com, zhangqing@...k-chips.com,
wmc@...k-chips.com, Frank Wang <frank.wang@...k-chips.com>
Subject: [PATCH v2 1/4] arm: dts: rk322x: add some assigned-clocks
From: Elaine Zhang <zhangqing@...k-chips.com>
Add CPLL, GPLL and some other assigned-clocks for rk322x SoC.
Signed-off-by: Elaine Zhang <zhangqing@...k-chips.com>
Signed-off-by: Frank Wang <frank.wang@...k-chips.com>
---
arch/arm/boot/dts/rk322x.dtsi | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index f7498b3..64368b0 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -346,8 +346,18 @@
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
- assigned-clocks = <&cru PLL_GPLL>;
- assigned-clock-rates = <594000000>;
+ assigned-clocks =
+ <&cru PLL_GPLL>, <&cru ARMCLK>,
+ <&cru PLL_CPLL>, <&cru ACLK_PERI>,
+ <&cru HCLK_PERI>, <&cru PCLK_PERI>,
+ <&cru ACLK_CPU>, <&cru HCLK_CPU>,
+ <&cru PCLK_CPU>;
+ assigned-clock-rates =
+ <594000000>, <816000000>,
+ <500000000>, <150000000>,
+ <150000000>, <75000000>,
+ <150000000>, <150000000>,
+ <75000000>;
};
thermal-zones {
--
2.0.0
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