linux-kernel - [PATCH 4/4] arm: dts: rk322x: update tsadc's frequence setting

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <1494996323-4678-5-git-send-email-frank.wang@rock-chips.com>
Date:   Wed, 17 May 2017 12:45:23 +0800
From:   Frank Wang <frank.wang@...k-chips.com>
To:     heiko@...ech.de, robh+dt@...nel.org, mark.rutland@....com,
        linux@...linux.org.uk, mturquette@...libre.com,
        sboyd@...eaurora.org, rjw@...ysocki.net, viresh.kumar@...aro.org,
        rui.zhang@...el.com, edubezval@...il.com
Cc:     linux-arm-kernel@...ts.infradead.org,
        linux-rockchip@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
        linux-clk@...r.kernel.org, charles.chen@...k-chips.com,
        cody.xie@...k-chips.com, kevan.lan@...k-chips.com,
        huangtao@...k-chips.com, rocky.hao@...k-chips.com,
        finley.xiao@...k-chips.com, zhangqing@...k-chips.com,
        wmc@...k-chips.com, Frank Wang <frank.wang@...k-chips.com>
Subject: [PATCH 4/4] arm: dts: rk322x: update tsadc's frequence setting

From: Rocky Hao <rocky.hao@...k-chips.com>

Update freq of tsadc's working clock as 32768 hz, if not set, tsadc
will work at a default frequence.

Signed-off-by: Frank Wang <frank.wang@...k-chips.com>
---
 arch/arm/boot/dts/rk322x.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 7809e56..d2e9641 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -434,6 +434,8 @@
 		interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
 		clock-names = "tsadc", "apb_pclk";
+		assigned-clocks = <&cru SCLK_TSADC>;
+		assigned-clock-rates = <32768>;
 		resets = <&cru SRST_TSADC>;
 		reset-names = "tsadc-apb";
 		pinctrl-names = "init", "default", "sleep";
-- 
2.0.0