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Message-ID: <8f4cf45e-45ab-e6e6-d95c-f3d4243697f4@cogentembedded.com>
Date: Wed, 17 May 2017 08:37:41 +0300
From: Nikita Yushchenko <nikita.yoush@...entembedded.com>
To: Dong Aisheng <dongas86@...il.com>
Cc: Dong Aisheng <aisheng.dong@....com>, linux-serial@...r.kernel.org,
fugang.duan@....com, gregkh@...uxfoundation.org, yangbo.lu@....com,
linux-kernel@...r.kernel.org, stefan@...er.ch, Mingkai.Hu@....com,
jslaby@...e.com, linux-arm-kernel@...ts.infradead.org
Subject: Re: [V2, 2/6] tty: serial: lpuart: add little endian 32 bit register
support
17.05.2017 06:39, Dong Aisheng wrote:
> On Tue, May 16, 2017 at 02:15:08PM +0300, Nikita Yushchenko wrote:
>>> static u32 lpuart32_read(void __iomem *addr)
>>> {
>>> - return ioread32be(addr);
>>> + return lpuart_is_be ? ioread32be(addr) : readl(addr);
>>> }
>>>
>>> static void lpuart32_write(u32 val, void __iomem *addr)
>>> {
>>> - iowrite32be(val, addr);
>>> + if (lpuart_is_be)
>>> + iowrite32be(val, addr);
>>> + else
>>> + writel(val, addr);
>>> }
>>
>> What if this is ever executed on big endian system?
>>
>
> Sorry, not catching the point...
>
> What issues will meet?
Isn't writel() in host endian?
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