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Message-ID: <20170517054356.GE9913@b29396-OptiPlex-7040>
Date:   Wed, 17 May 2017 13:43:57 +0800
From:   Dong Aisheng <dongas86@...il.com>
To:     Nikita Yushchenko <nikita.yoush@...entembedded.com>
Cc:     Dong Aisheng <aisheng.dong@....com>, linux-serial@...r.kernel.org,
        fugang.duan@....com, gregkh@...uxfoundation.org, yangbo.lu@....com,
        linux-kernel@...r.kernel.org, stefan@...er.ch, Mingkai.Hu@....com,
        jslaby@...e.com, linux-arm-kernel@...ts.infradead.org
Subject: Re: [V2, 2/6] tty: serial: lpuart: add little endian 32 bit register
 support

On Wed, May 17, 2017 at 08:37:41AM +0300, Nikita Yushchenko wrote:
> 
> 
> 17.05.2017 06:39, Dong Aisheng wrote:
> > On Tue, May 16, 2017 at 02:15:08PM +0300, Nikita Yushchenko wrote:
> >>>  static u32 lpuart32_read(void __iomem *addr)
> >>>  {
> >>> -	return ioread32be(addr);
> >>> +	return lpuart_is_be ? ioread32be(addr) : readl(addr);
> >>>  }
> >>>  
> >>>  static void lpuart32_write(u32 val, void __iomem *addr)
> >>>  {
> >>> -	iowrite32be(val, addr);
> >>> +	if (lpuart_is_be)
> >>> +		iowrite32be(val, addr);
> >>> +	else
> >>> +		writel(val, addr);
> >>>  }
> >>
> >> What if this is ever executed on big endian system?
> >>
> > 
> > Sorry, not catching the point...
> > 
> > What issues will meet?
> 
> Isn't writel() in host endian?

On big endian systems, it is supposed to run iowrite32be.

Regards
Dong Aisheng

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