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Message-ID: <20170518140906.5854a344@crub>
Date: Thu, 18 May 2017 14:09:06 +0200
From: Anatolij Gustschin <agust@...x.de>
To: joshua.clayton@...west.com
Cc: linux-fpga@...r.kernel.org, Alan Tull <atull@...nel.org>,
Moritz Fischer <moritz.fischer@...us.com>,
linux-kernel@...r.kernel.org,
Joshua Clayton <stillcompiling@...il.com>
Subject: Re: [PATCH] fpga: Add flag to indicate SPI bitstream is
bit-reversed
Hi Joshua,
On Wed, 17 May 2017 07:47:42 -0700
joshua.clayton@...west.com joshua.clayton@...west.com wrote:
...
>> #define FPGA_MGR_ENCRYPTED_BITSTREAM BIT(2)
>> +#define FPGA_MGR_SPI_BITSTREAM_LSB_FIRST BIT(3)
>My thought here is that FPGA_MGR_BITSTREAM_LSB_FIRST
>is a bit shorter, adequate, and could do if another upload method
>happened to use LSB first organized data.
OK, I'll change and resubmit.
Thanks,
Anatolij
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