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Message-Id: <9497ce52-dd0d-0c99-2d0f-de980dfbe28e@linux.vnet.ibm.com>
Date:   Fri, 19 May 2017 18:37:22 +0530
From:   Anshuman Khandual <khandual@...ux.vnet.ibm.com>
To:     Zi Yan <zi.yan@...t.com>, n-horiguchi@...jp.nec.com,
        kirill.shutemov@...ux.intel.com, linux-kernel@...r.kernel.org,
        linux-mm@...ck.org
Cc:     akpm@...ux-foundation.org, minchan@...nel.org, vbabka@...e.cz,
        mgorman@...hsingularity.net, mhocko@...nel.org,
        khandual@...ux.vnet.ibm.com, zi.yan@...rutgers.edu,
        dnellans@...dia.com, Dave Hansen <dave.hansen@...el.com>,
        andi.kleen@...el.com
Subject: Re: [PATCH v5 01/11] mm: x86: move _PAGE_SWP_SOFT_DIRTY from bit 7 to
 bit 1

On 04/21/2017 02:17 AM, Zi Yan wrote:
> From: Naoya Horiguchi <n-horiguchi@...jp.nec.com>
> 
> pmd_present() checks _PAGE_PSE along with _PAGE_PRESENT to avoid
> false negative return when it races with thp spilt
> (during which _PAGE_PRESENT is temporary cleared.) I don't think that
> dropping _PAGE_PSE check in pmd_present() works well because it can
> hurt optimization of tlb handling in thp split.
> In the current kernel, bits 1-4 are not used in non-present format
> since commit 00839ee3b299 ("x86/mm: Move swap offset/type up in PTE to
> work around erratum"). So let's move _PAGE_SWP_SOFT_DIRTY to bit 1.
> Bit 7 is used as reserved (always clear), so please don't use it for
> other purpose.
> 
> Signed-off-by: Naoya Horiguchi <n-horiguchi@...jp.nec.com>
> Signed-off-by: Zi Yan <zi.yan@...rutgers.edu>

+Dave Hansen
+Andi Kleen

Dave/Andi/Kiril,

Does this change looks okay ? Its been on the list for some time
now. Could you please have a look into this and lets us know your
inputs/suggestions/comments ? Thank you.

- Anshuman

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