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Message-ID: <6d82d33c-df7d-f1ea-979a-5898efe88528@linux.intel.com>
Date:   Fri, 19 May 2017 21:33:12 +0800
From:   "Jin, Yao" <yao.jin@...ux.intel.com>
To:     Peter Zijlstra <peterz@...radead.org>
Cc:     acme@...nel.org, jolsa@...nel.org, mingo@...hat.com,
        alexander.shishkin@...ux.intel.com, Linux-kernel@...r.kernel.org,
        ak@...ux.intel.com, kan.liang@...el.com, yao.jin@...el.com,
        Will Deacon <will.deacon@....com>,
        Mark Rutland <mark.rutland@....com>
Subject: Re: [PATCH] perf/x86/intel: Drop kernel samples even though :u is
 specified



On 5/19/2017 8:36 PM, Peter Zijlstra wrote:
> On Fri, May 19, 2017 at 08:24:19PM +0800, Jin, Yao wrote:
>>> Ah, I was more thinking of something like PERF_PMU_CAP_NO_SKID or
>>> something that would skip the test and preserve current behaviour.
>> OK, I understand now. For example, for PEBS event, its capabilities should
>> be set with PERF_PMU_CAP_NO_SKID.
> Except you cannot in fact do that, since PEBS is the same struct pmu as
> the normal counters (they share counter space after all).
>
> Also, weren't there PEBS errata that would allow this to happen?
>
> But no, more for other architectures to opt out for some reason. But I'm
> thinking we want to start out by unconditionally doing this. It would be
> good to try and Cc most arch pmu maintainers on this though, so they can
> object.
>
I'm thinking v2 of patch will only do simple tasks:

1. Define PERF_PMU_CAP_NO_SKID but don't bind it to any event.

2. Move the skid checking from x86 specific code to generic code. Before 
performing skid checking, test the PERF_PMU_CAP_NO_SKID bit first.

For binding PERF_PMU_CAP_NO_SKID to event, that may be other arch 
related patches.

Thanks
Jin Yao


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