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Message-Id: <fd62952c043aec1d87ff65d9d69105103a195908.1495209464.git-series.gregory.clement@free-electrons.com>
Date: Fri, 19 May 2017 17:58:03 +0200
From: Gregory CLEMENT <gregory.clement@...e-electrons.com>
To: Stephen Boyd <sboyd@...eaurora.org>,
Mike Turquette <mturquette@...libre.com>,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Jason Cooper <jason@...edaemon.net>, Andrew Lunn <andrew@...n.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Gregory CLEMENT <gregory.clement@...e-electrons.com>,
Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
linux-arm-kernel@...ts.infradead.org,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
Nadav Haklai <nadavh@...vell.com>,
Kostya Porotchkin <kostap@...vell.com>,
Neta Zur Hershkovits <neta@...vell.com>,
Marcin Wojtas <mw@...ihalf.com>,
Omri Itach <omrii@...vell.com>,
Shadi Ammouri <shadi@...vell.com>
Subject: [PATCH 3/5] clk: mvebu: ap806: introduce a new binding
As for cp110, the initial intent when the binding of the ap806 system
controller was to have one flat node. The idea being that what is
currently a clock-only driver in drivers would become a MFD driver,
exposing the clock, GPIO and pinctrl functionality. However, after taking
a step back, this would lead to a messy binding. Indeed, a single node
would be a GPIO controller, clock controller, pinmux controller, and
more.
This patch adopts a more classical solution of a top-level syscon node
with sub-nodes for the individual devices. The main benefit will be to
have each functional block associated to its own sub-node where we can
put its own properties.
The introduction of the Armada 7K/8K is still in the early stage so the
plan is to remove the old binding. However, we don't want to break the
device tree compatibility for the few devices already in the field. For
this we still keep the support of the legacy compatible string with a big
warning in the kernel about updating the device tree.
Signed-off-by: Gregory CLEMENT <gregory.clement@...e-electrons.com>
---
Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt | 20 +++++++++++++++-----
drivers/clk/mvebu/ap806-system-controller.c | 56 ++++++++++++++++++++++++++++++++++++++++++++------------
2 files changed, 59 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt
index 3faab71dff9f..888c50e0d64f 100644
--- a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt
+++ b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt
@@ -7,6 +7,14 @@ registers giving access to numerous features: clocks, pin-muxing and
many other SoC configuration items. This DT binding allows to describe
this system controller.
+For the top level node:
+ - compatible: must be: "syscon", "simple-mfd";
+ - reg: register area of the AP806 system controller
+
+Clocks:
+-------
+
+
The Device Tree node representing the AP806 system controller provides
a number of clocks:
@@ -17,15 +25,17 @@ a number of clocks:
Required properties:
- - compatible: must be:
- "marvell,ap806-system-controller", "syscon"
- - reg: register area of the AP806 system controller
+ - compatible: must be: "marvell,ap806-clock"
- #clock-cells: must be set to 1
Example:
syscon: system-controller@...000 {
- compatible = "marvell,ap806-system-controller", "syscon";
- #clock-cells = <1>;
+ compatible = "syscon", "simple-mfd";
reg = <0x6f4000 0x1000>;
+
+ ap_clk: clock {
+ compatible = "marvell,ap806-clock";
+ #clock-cells = <1>;
+ };
};
diff --git a/drivers/clk/mvebu/ap806-system-controller.c b/drivers/clk/mvebu/ap806-system-controller.c
index 95ae16e203ea..fa2fbd2cef4a 100644
--- a/drivers/clk/mvebu/ap806-system-controller.c
+++ b/drivers/clk/mvebu/ap806-system-controller.c
@@ -44,7 +44,8 @@ static char *ap806_unique_name(struct device *dev, struct device_node *np,
(unsigned long long)addr, name);
}
-static int ap806_syscon_clk_probe(struct platform_device *pdev)
+static int ap806_syscon_common_probe(struct platform_device *pdev,
+ struct device_node *syscon_node)
{
unsigned int freq_mode, cpuclk_freq;
const char *name, *fixedclk_name;
@@ -54,7 +55,7 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev)
u32 reg;
int ret;
- regmap = syscon_node_to_regmap(np);
+ regmap = syscon_node_to_regmap(syscon_node);
if (IS_ERR(regmap)) {
dev_err(dev, "cannot get regmap\n");
return PTR_ERR(regmap);
@@ -110,7 +111,7 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev)
cpuclk_freq *= 1000 * 1000;
/* CPU clocks depend on the Sample At Reset configuration */
- name = ap806_unique_name(dev, np, "cpu-cluster-0");
+ name = ap806_unique_name(dev, syscon_node, "cpu-cluster-0");
ap806_clks[0] = clk_register_fixed_rate(dev, name, NULL,
0, cpuclk_freq);
if (IS_ERR(ap806_clks[0])) {
@@ -118,7 +119,7 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev)
goto fail0;
}
- name = ap806_unique_name(dev, np, "cpu-cluster-1");
+ name = ap806_unique_name(dev, syscon_node, "cpu-cluster-1");
ap806_clks[1] = clk_register_fixed_rate(dev, name, NULL, 0,
cpuclk_freq);
if (IS_ERR(ap806_clks[1])) {
@@ -127,7 +128,7 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev)
}
/* Fixed clock is always 1200 Mhz */
- fixedclk_name = ap806_unique_name(dev, np, "fixed");
+ fixedclk_name = ap806_unique_name(dev, syscon_node, "fixed");
ap806_clks[2] = clk_register_fixed_rate(dev, fixedclk_name, NULL,
0, 1200 * 1000 * 1000);
if (IS_ERR(ap806_clks[2])) {
@@ -136,7 +137,7 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev)
}
/* MSS Clock is fixed clock divided by 6 */
- name = ap806_unique_name(dev, np, "mss");
+ name = ap806_unique_name(dev, syscon_node, "mss");
ap806_clks[3] = clk_register_fixed_factor(NULL, name, fixedclk_name,
0, 1, 6);
if (IS_ERR(ap806_clks[3])) {
@@ -145,7 +146,7 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev)
}
/* SDIO(/eMMC) Clock is fixed clock divided by 3 */
- name = ap806_unique_name(dev, np, "sdio");
+ name = ap806_unique_name(dev, syscon_node, "sdio");
ap806_clks[4] = clk_register_fixed_factor(NULL, name,
fixedclk_name,
0, 1, 3);
@@ -175,17 +176,48 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev)
return ret;
}
-static const struct of_device_id ap806_syscon_of_match[] = {
+static int ap806_syscon_legacy_probe(struct platform_device *pdev)
+{
+ dev_warn(&pdev->dev, FW_WARN "Using legacy device tree binding\n");
+ dev_warn(&pdev->dev, FW_WARN "Update your device tree:\n");
+ dev_warn(&pdev->dev, FW_WARN
+ "This binding won't be supported in future kernel\n");
+
+ return ap806_syscon_common_probe(pdev, pdev->dev.of_node);
+
+}
+
+static int ap806_clock_probe(struct platform_device *pdev)
+{
+ return ap806_syscon_common_probe(pdev, pdev->dev.of_node->parent);
+}
+
+static const struct of_device_id ap806_syscon_legacy_of_match[] = {
{ .compatible = "marvell,ap806-system-controller", },
{ }
};
-static struct platform_driver ap806_syscon_driver = {
- .probe = ap806_syscon_clk_probe,
+static struct platform_driver ap806_syscon_legacy_driver = {
+ .probe = ap806_syscon_legacy_probe,
.driver = {
.name = "marvell-ap806-system-controller",
- .of_match_table = ap806_syscon_of_match,
+ .of_match_table = ap806_syscon_legacy_of_match,
+ .suppress_bind_attrs = true,
+ },
+};
+builtin_platform_driver(ap806_syscon_legacy_driver);
+
+static const struct of_device_id ap806_clock_of_match[] = {
+ { .compatible = "marvell,ap806-clock", },
+ { }
+};
+
+static struct platform_driver ap806_clock_driver = {
+ .probe = ap806_clock_probe,
+ .driver = {
+ .name = "marvell-ap806-clock",
+ .of_match_table = ap806_clock_of_match,
.suppress_bind_attrs = true,
},
};
-builtin_platform_driver(ap806_syscon_driver);
+builtin_platform_driver(ap806_clock_driver);
--
git-series 0.9.1
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