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Message-ID: <8e402c6d-7912-afb0-7be7-76dd9b06cf57@oracle.com>
Date:   Fri, 19 May 2017 11:37:06 -0500
From:   Babu Moger <babu.moger@...cle.com>
To:     David Miller <davem@...emloft.net>
Cc:     peterz@...radead.org, mingo@...hat.com, arnd@...db.de,
        shannon.nelson@...cle.com, haakon.bugge@...cle.com,
        steven.sistare@...cle.com, vijay.ac.kumar@...cle.com,
        jane.chu@...cle.com, sparclinux@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arch@...r.kernel.org
Subject: Re: [PATCH 6/6] arch/sparc: Enable queued spinlock support for SPARC


On 5/18/2017 9:32 PM, David Miller wrote:
> From: Babu Moger <babu.moger@...cle.com>
> Date: Thu, 18 May 2017 18:36:10 -0600
>
>> @@ -83,6 +83,7 @@ config SPARC64
>>   	select ARCH_SUPPORTS_ATOMIC_RMW
>>   	select HAVE_NMI
>>   	select ARCH_USE_QUEUED_RWLOCKS
>> +	select ARCH_USE_QUEUED_SPINLOCKS
>>   
>>   config ARCH_DEFCONFIG
>>   	string
> Like the queued spinlock enabling patch, if this will be on
> all the time for SPARC64 then:
>
>> diff --git a/arch/sparc/include/asm/spinlock_64.h b/arch/sparc/include/asm/spinlock_64.h
>> index 562dbd8..e2044e3 100644
>> --- a/arch/sparc/include/asm/spinlock_64.h
>> +++ b/arch/sparc/include/asm/spinlock_64.h
>> @@ -11,6 +11,9 @@
>>   #include <asm/processor.h>
>>   #include <asm/barrier.h>
>>   
>> +#ifdef CONFIG_QUEUED_SPINLOCKS
>> +#include <asm/qspinlock.h>
>> +#else
> This ifdef doesn't make any sense, by definition it will always be on.

Ok. Will do. thanks

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