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Message-ID: <3FCDBC05-20A1-460C-A21B-8C3E9C776768@aosc.io>
Date: Sat, 20 May 2017 02:08:18 +0800
From: Icenowy Zheng <icenowy@...c.io>
To: Maxime Ripard <maxime.ripard@...e-electrons.com>
CC: Rob Herring <robh+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org, linux-sunxi@...glegroups.com
Subject: Re: [RFC PATCH 07/11] drm: sun4i: add support for the TV encoder in H3 SoC
于 2017年5月20日 GMT+08:00 上午2:03:30, Maxime Ripard <maxime.ripard@...e-electrons.com> 写到:
>On Thu, May 18, 2017 at 12:43:50AM +0800, Icenowy Zheng wrote:
>> Allwinner H3 features a TV encoder similar to the one in earlier
>SoCs,
>> but with some different points about clocks:
>> - It has a mod clock and a bus clock.
>> - The mod clock must be at a fixed rate to generate signal.
>
>Why?
It's experiment result by Jernej.
The clock rates in BSP kernel is also specially designed
(PLL_DE at 432MHz) in order to be able to feed the TVE.
>
>Maxime
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