linux-kernel - Re: [PATCH v2] drm/pl111: Register the clock divider and use it.

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Fri, 19 May 2017 11:12:18 -0700
From:   Eric Anholt <eric@...olt.net>
To:     Stephen Boyd <sboyd@...eaurora.org>
Cc:     dri-devel@...ts.freedesktop.org,
        Russell King <linux@...linux.org.uk>, linus.walleij@...aro.org,
        Michael Turquette <mturquette@...libre.com>,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] drm/pl111: Register the clock divider and use it.

Stephen Boyd <sboyd@...eaurora.org> writes:

> On 05/08, Eric Anholt wrote:
>> This is required for the panel to work on bcm911360, where CLCDCLK is
>> the fixed 200Mhz AXI41 clock.  The rate set is still passed up to the
>> CLCDCLK, for platforms that have a settable rate on that one.
>> 
>> v2: Set SET_RATE_PARENT (caught by Linus Walleij), depend on
>>     COMMON_CLK.
>> 
>> Signed-off-by: Eric Anholt <eric@...olt.net>
>
> Reviewed-by: Stephen Boyd <sboyd@...eaurora.org>
>
> One minor comment below
>
>> diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c
>> index 39a5c33bce7d..2d924a6bf43c 100644
>> --- a/drivers/gpu/drm/pl111/pl111_display.c
>> +++ b/drivers/gpu/drm/pl111/pl111_display.c
>> @@ -288,6 +296,126 @@ const struct drm_simple_display_pipe_funcs pl111_display_funcs = {
> [...]
>> +
>> +	return 0;
>> +}
>> +
>> +const struct clk_ops pl111_clk_div_ops = {
>
> static?

Fixed, thanks.

Download attachment "signature.asc" of type "application/pgp-signature" (833 bytes)