linux-kernel - RE: [PATCH 18/24] thunderbolt: Store Thunderbolt generation in the switch structure

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Message-ID: <BN4PR11MB099695C2D16C566CC9F2EC18E6FB0@BN4PR11MB0996.namprd11.prod.outlook.com>
Date:   Sun, 21 May 2017 11:18:01 +0000
From:   "Bernat, Yehezkel" <yehezkel.bernat@...el.com>
To:     Mika Westerberg <mika.westerberg@...ux.intel.com>
CC:     "Levy, Amir (Jer)" <amir.jer.levy@...el.com>,
        Lukas Wunner <lukas@...ner.de>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        "Andreas Noever" <andreas.noever@...il.com>,
        "Jamet, Michael" <michael.jamet@...el.com>,
        Andy Lutomirski <luto@...nel.org>,
        "Mario.Limonciello@...l.com" <Mario.Limonciello@...l.com>,
        "Jared.Dominguez@...l.com" <Jared.Dominguez@...l.com>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 18/24] thunderbolt: Store Thunderbolt generation in the
 switch structure



> -----Original Message-----
> From: Mika Westerberg [mailto:mika.westerberg@...ux.intel.com]
> Sent: Sunday, May 21, 2017 13:47
> To: Bernat, Yehezkel <yehezkel.bernat@...el.com>
> Cc: Levy, Amir (Jer) <amir.jer.levy@...el.com>; Lukas Wunner
> <lukas@...ner.de>; Greg Kroah-Hartman <gregkh@...uxfoundation.org>;
> Andreas Noever <andreas.noever@...il.com>; Jamet, Michael
> <michael.jamet@...el.com>; Andy Lutomirski <luto@...nel.org>;
> Mario.Limonciello@...l.com; Jared.Dominguez@...l.com; Andy Shevchenko
> <andriy.shevchenko@...ux.intel.com>; linux-kernel@...r.kernel.org
> Subject: Re: [PATCH 18/24] thunderbolt: Store Thunderbolt generation in the
> switch structure
> 
> On Sun, May 21, 2017 at 09:55:55AM +0000, Bernat, Yehezkel wrote:
> >
> >
> > > -----Original Message-----
> > > From: Levy, Amir (Jer)
> > > Sent: Sunday, May 21, 2017 11:07
> > > To: Mika Westerberg <mika.westerberg@...ux.intel.com>; Lukas Wunner
> > > <lukas@...ner.de>
> > > Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>; Andreas
> Noever
> > > <andreas.noever@...il.com>; Jamet, Michael
> > > <michael.jamet@...el.com>; Bernat, Yehezkel
> > > <yehezkel.bernat@...el.com>; Andy Lutomirski <luto@...nel.org>;
> > > Mario.Limonciello@...l.com; Jared.Dominguez@...l.com; Andy
> > > Shevchenko <andriy.shevchenko@...ux.intel.com>;
> > > linux-kernel@...r.kernel.org
> > > Subject: RE: [PATCH 18/24] thunderbolt: Store Thunderbolt generation
> > > in the switch structure
> > >
> > > On Sun, May 21 2017, 11:00 AM, Mika Westerberg wrote:
> > > > On Sun, May 21, 2017 at 10:40:41AM +0300, Mika Westerberg wrote:
> > > > > On Sun, May 21, 2017 at 07:35:21AM +0200, Lukas Wunner wrote:
> > > > > > On Sun, May 21, 2017 at 05:29:47AM +0000, Levy, Amir (Jer) wrote:
> > > > > > > On Sun, May 21 2017, 07:47 AM, Lukas Wunner wrote:
> > > > > > > > On Thu, May 18, 2017 at 05:39:08PM +0300, Mika Westerberg
> wrote:
> > > > > > > > > +
> > > > > > > > > +	default:
> > > > > > > > > +		sw->generation = 1;
> > > > > > > > > +		break;
> > > > > > > >
> > > > > > > > If someone adds an entry for, say, a new TB3 controller to
> > > > > > > > nhi_ids[] but forgets to update this function, the
> > > > > > > > controller is assigned the wrong generation number.  It
> > > > > > > > might be better to make TB3 the default and list each TB1
> > > > > > > > controller instead since it's less likely for Intel to introduce an
> older gen chip.
> > > > > > > >
> > > > > > > > Generally I think it's problematic to require that
> > > > > > > > multiple files are touched whenever a new controller is
> > > > > > > > added.  Isn't the generation number or link speed
> > > > > > > > (10/20/40) stored in some register in PCI config space (VSEC
> 0x1234) or TB config space?
> > > > > > >
> > > > > > > How about setting information, that isn't available from
> > > > > > > PCI, in pci_device_id.driver_data when initializing nhi_ids[]?
> > > > > >
> > > > > > Right, that would also be possible, though reading the
> > > > > > generation number from a register would be more elegant, if such a
> register exists.
> > > > >
> > > > > I don't think there is such register but I can put this
> > > > > information to the driver_data instead.
> > > >
> > > > Actually these are Thunderbolt switch IDs, not NHI PCI IDs so I
> > > > don't think driver_data is the right place after all. So if no
> > > > objections, I'll update the function to default to TBT3 but keep
> > > > the switch case and add the TBT1 IDs + Win Ridge there.
> > >
> > > There is correlation between switch ID to NHI ID.
> >
> > I'm not sure defaulting to TBT3 is a good idea. ICM message format can
> > be changed, DMA port can be different, nothing guaranties correct
> > operation of the driver with newer unknown controllers.
> 
> Fair enough :) Then we just need to remember to update the function here
> as new generations get added and tested.
> 
> I suppose you don't know either if we could use the revision or similar field in
> the switch config space to determine generation somehow?

Nothing that I'm aware of.
Still, I like the idea of having a table-like construct somewhere in the code to centralize the handling of various controller-specific info (generation, DMA port, maybe more things in the future).