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Message-ID: <E607265CB020454880711A6F96C05A030106862644@hasmsx107.ger.corp.intel.com>
Date:   Sun, 21 May 2017 05:29:47 +0000
From:   "Levy, Amir (Jer)" <amir.jer.levy@...el.com>
To:     Lukas Wunner <lukas@...ner.de>,
        Mika Westerberg <mika.westerberg@...ux.intel.com>
CC:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Andreas Noever <andreas.noever@...il.com>,
        "Jamet, Michael" <michael.jamet@...el.com>,
        "Bernat, Yehezkel" <yehezkel.bernat@...el.com>,
        Andy Lutomirski <luto@...nel.org>,
        "Mario.Limonciello@...l.com" <Mario.Limonciello@...l.com>,
        "Jared.Dominguez@...l.com" <Jared.Dominguez@...l.com>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 18/24] thunderbolt: Store Thunderbolt generation in the
 switch structure

On Sun, May 21 2017, 07:47 AM, Lukas Wunner wrote:
> On Thu, May 18, 2017 at 05:39:08PM +0300, Mika Westerberg wrote:
> > +
> > +	default:
> > +		sw->generation = 1;
> > +		break;
> 
> If someone adds an entry for, say, a new TB3 controller to nhi_ids[] but forgets
> to update this function, the controller is assigned the wrong generation
> number.  It might be better to make TB3 the default and list each TB1
> controller instead since it's less likely for Intel to introduce an older gen chip.
> 
> Generally I think it's problematic to require that multiple files are touched
> whenever a new controller is added.  Isn't the generation number or link speed
> (10/20/40) stored in some register in PCI config space (VSEC 0x1234) or TB
> config space?
> 
> Thanks,
> 
> Lukas
> 

How about setting information, that isn't available from PCI, in pci_device_id.driver_data when initializing nhi_ids[]?

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