linux-kernel - Re: [PATCH 18/24] thunderbolt: Store Thunderbolt generation in the switch structure

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20170521074041.GK8541@lahna.fi.intel.com>
Date:   Sun, 21 May 2017 10:40:41 +0300
From:   Mika Westerberg <mika.westerberg@...ux.intel.com>
To:     Lukas Wunner <lukas@...ner.de>
Cc:     "Levy, Amir (Jer)" <amir.jer.levy@...el.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Andreas Noever <andreas.noever@...il.com>,
        "Jamet, Michael" <michael.jamet@...el.com>,
        "Bernat, Yehezkel" <yehezkel.bernat@...el.com>,
        Andy Lutomirski <luto@...nel.org>,
        "Mario.Limonciello@...l.com" <Mario.Limonciello@...l.com>,
        "Jared.Dominguez@...l.com" <Jared.Dominguez@...l.com>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 18/24] thunderbolt: Store Thunderbolt generation in the
 switch structure

On Sun, May 21, 2017 at 07:35:21AM +0200, Lukas Wunner wrote:
> On Sun, May 21, 2017 at 05:29:47AM +0000, Levy, Amir (Jer) wrote:
> > On Sun, May 21 2017, 07:47 AM, Lukas Wunner wrote:
> > > On Thu, May 18, 2017 at 05:39:08PM +0300, Mika Westerberg wrote:
> > > > +
> > > > +	default:
> > > > +		sw->generation = 1;
> > > > +		break;
> > > 
> > > If someone adds an entry for, say, a new TB3 controller to nhi_ids[] but
> > > forgets to update this function, the controller is assigned the wrong
> > > generation number.  It might be better to make TB3 the default and list
> > > each TB1 controller instead since it's less likely for Intel to introduce
> > > an older gen chip.
> > > 
> > > Generally I think it's problematic to require that multiple files are
> > > touched whenever a new controller is added.  Isn't the generation number
> > > or link speed (10/20/40) stored in some register in PCI config space
> > > (VSEC 0x1234) or TB config space?
> > 
> > How about setting information, that isn't available from PCI, in
> > pci_device_id.driver_data when initializing nhi_ids[]?
> 
> Right, that would also be possible, though reading the generation number
> from a register would be more elegant, if such a register exists.

I don't think there is such register but I can put this information to
the driver_data instead.