linux-kernel - Re: [PATCH] ARM: cpuidle: Support asymmetric idle definition

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <abfc0a2d-04bc-6714-f772-5f5ae23a1680@linaro.org>
Date:   Mon, 22 May 2017 16:48:14 +0200
From:   Daniel Lezcano <daniel.lezcano@...aro.org>
To:     Sudeep Holla <sudeep.holla@....com>
Cc:     rjw@...ysocki.net, lorenzo.pieralisi@....com, leo.yan@...aro.org,
        "open list:CPUIDLE DRIVERS" <linux-pm@...r.kernel.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] ARM: cpuidle: Support asymmetric idle definition

On 22/05/2017 15:02, Sudeep Holla wrote:

[ ... ]

>>>>>> +		drv->cpumask = &cpu_topology[cpu].core_sibling;
>>>>>> +
>>>>>
>>>>> This is not always true and not architecturally guaranteed. So instead
>>>>> of introducing this broken dependency, better to extract information
>>>>> from the device tree.
>>>>
>>>> Can you give an example of a broken dependency ?
>>>>
>>>> The cpu topology information is extracted from the device tree. So
>>>> if the topology is broken, the DT is broken also. Otherwise, the
>>>> topology code must fix the broken dependency from the DT.
>>>>
>>>
>>> No, I meant there's no guarantee that all designs must follow this rule.
>>> I don't mean CPU topology code or binding is broken. What I meant is
>>> linking CPU topology to CPU power domains is wrong. We should make use
>>> of DT you infer this information as it's already there. Topology bindings
>>> makes no reference to power and hence you simply can't infer that
>>> information from it.
>>
>> Ok, I will have a look how power domains can fit in this.
>>
>> However I'm curious to know a platform with a cluster idle state
>> powering down only a subset of CPUs belonging to the cluster.
>>
> 
> We can't reuse CPU topology for power domains:
> 1. As I mentioned earlier for sure, it won't be same with ARM DynamIQ.
> 2. Topology bindings strictly restrict themselves with topology and not
> connected with power-domains. We also have separate power domain
> bindings.

Yes, the theory is valid, but practically nowadays I don't see where we
have a cluster defined by a topology with a different cluster power domain.

By the way, if you have any pointer to documentation for DynamIQ PM and
design? I would be interested to have a look.

> We need to separate topology and power domains. We have some dependency
> like this in big little drivers(both CPUfreq and CPUIdle) but that
> dependencies must be removed as they are not architecturally guaranteed.
> Lorenzo had a patch[1] to solve this issue, I can post the latest
> version of it again and continue the discussion after some basic
> rebase/testing.

Actually, I am not convinced by the approach proposed in this patch.

Let me have a look at the idle power domain before, I do believe we can
do something much more simple.

Thanks.

  -- Daniel


-- 
 <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog