linux-kernel - Re: [PATCH V7] perf/x86: add sysfs entry to freeze counter on SMI

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Message-ID: <alpine.DEB.2.20.1705230913560.2740@nanos>
Date:   Tue, 23 May 2017 09:14:25 +0200 (CEST)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Kan Liang <kan.liang@...el.com>
cc:     peterz@...radead.org, mingo@...hat.com,
        linux-kernel@...r.kernel.org, bp@...en8.de, acme@...nel.org,
        eranian@...gle.com, jolsa@...nel.org, ak@...ux.intel.com
Subject: Re: [PATCH V7] perf/x86: add sysfs entry to freeze counter on SMI

On Fri, 12 May 2017, kan.liang@...el.com wrote:

> From: Kan Liang <Kan.liang@...el.com>
> 
> Currently, the SMIs are visible to all performance counters. Because
> many users want to measure everything including SMIs. But in some
> cases, the SMI cycles should not be count. For example, to calculate
> the cost of SMI itself. So a knob is needed.
> 
> When setting FREEZE_WHILE_SMM bit in IA32_DEBUGCTL, all performance
> counters will be effected. There is no way to do per-counter freeze
> on SMI. So it should not use the per-event interface (e.g. ioctl or
> event attribute) to set FREEZE_WHILE_SMM bit.
> 
> Adds sysfs entry /sys/device/cpu/freeze_on_smi to set FREEZE_WHILE_SMM
> bit in IA32_DEBUGCTL. When set, freezes perfmon and trace messages
> while in SMM.
> Value has to be 0 or 1. It will be applied to all processors.
> Also serialize the entire setting so we don't get multiple concurrent
> threads trying to update to different values.
> 
> Signed-off-by: Kan Liang <Kan.liang@...el.com>

Reviewed-by: Thomas Gleixner <tglx@...utronix.de>