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Message-ID: <CAGb2v65uBhnyR5fwhPuTyt_Nss-6WMNaXPFT3X_HpH23YGp1Hg@mail.gmail.com>
Date:   Wed, 24 May 2017 18:30:15 +0800
From:   Chen-Yu Tsai <wens@...e.org>
To:     Icenowy Zheng <icenowy@...c.io>
Cc:     Vinod Koul <vinod.koul@...el.com>,
        Maxime Ripard <maxime.ripard@...e-electrons.com>,
        Chen-Yu Tsai <wens@...e.org>,
        Liam Girdwood <lgirdwood@...il.com>,
        Mark Brown <broonie@...nel.org>,
        Jaroslav Kysela <perex@...ex.cz>,
        Takashi Iwai <tiwai@...e.com>, dmaengine@...r.kernel.org,
        devicetree <devicetree@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        Linux-ALSA <alsa-devel@...a-project.org>,
        linux-sunxi <linux-sunxi@...glegroups.com>,
        Icenowy Zheng <icenowy@...c.xyz>
Subject: Re: [linux-sunxi] [PATCH v3 5/9] dmaengine: sun6i: make gate bit in
 sun8i's DMA engines a common quirk

On Wed, May 24, 2017 at 6:06 PM, Icenowy Zheng <icenowy@...c.io> wrote:
> From: Icenowy Zheng <icenowy@...c.xyz>
>
> Originally we enable a special gate bit when the compatible indicates
> A23/33.
>
> But according to BSP sources and user manuals, more SoCs will need this
> gate bit.
>
> So make it a common quirk configured in the config struct.
>
> Signed-off-by: Icenowy Zheng <icenowy@...c.xyz>
> ---
> Changes in v3:
> - Stripped out the A83T gate bit set.
>
>  drivers/dma/sun6i-dma.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
> index a2358780ab2c..69840cf6fe98 100644
> --- a/drivers/dma/sun6i-dma.c
> +++ b/drivers/dma/sun6i-dma.c
> @@ -101,6 +101,11 @@ struct sun6i_dma_config {
>         u32 nr_max_channels;
>         u32 nr_max_requests;
>         u32 nr_max_vchans;
> +       /*
> +        * The hardware has a special gate bit, which is needed to
> +        * be enabled for some SoCs with a sun6i-style DMA engine.
> +        */
> +       bool gate_needed;

The user manual identifies the gate bit as "DMA MCLK interface circuit
auto gating bit", which, when set to 1, disables auto gating. It also
has a footnote saying "When initializing DMA Controller, bit 2 (this
bit) should be set up."

Please include this information in the comment. Also you might want to
merge the two comment blocks and keep all the information in one place.

Curiously on the A83T I didn't need to set the bit for DMA to work.
ChenYu

>  };
>
>  /*
> @@ -1009,6 +1014,7 @@ static struct sun6i_dma_config sun8i_a23_dma_cfg = {
>         .nr_max_channels = 8,
>         .nr_max_requests = 24,
>         .nr_max_vchans   = 37,
> +       .gate_needed     = true,
>  };
>
>  static struct sun6i_dma_config sun8i_a83t_dma_cfg = {
> @@ -1177,10 +1183,10 @@ static int sun6i_dma_probe(struct platform_device *pdev)
>         /*
>          * sun8i variant requires us to toggle a dma gating register,
>          * as seen in Allwinner's SDK. This register is not documented
> -        * in the A23 user manual.
> +        * in the A23 user manual, but documented at least in V3s user
> +        * manual.
>          */
> -       if (of_device_is_compatible(pdev->dev.of_node,
> -                                   "allwinner,sun8i-a23-dma"))
> +       if (sdc->cfg->gate_needed)
>                 writel(SUN8I_DMA_GATE_ENABLE, sdc->base + SUN8I_DMA_GATE);
>
>         return 0;
> --
> 2.12.2
>
> --
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