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Date:   Wed, 24 May 2017 16:42:57 +1200
From:   Derek Robson <robsonde@...il.com>
To:     gilad@...yossef.com, gregkh@...uxfoundation.org
Cc:     linux-crypto@...r.kernel.org,
        driverdev-devel@...uxdriverproject.org, devel@...verdev.osuosl.org,
        linux-kernel@...r.kernel.org, Derek Robson <robsonde@...il.com>
Subject: [PATCH 08/27] Drivers: ccree: ssi_ivgen.c - align block comments

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson <robsonde@...il.com>
---
 drivers/staging/ccree/ssi_ivgen.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/ccree/ssi_ivgen.c b/drivers/staging/ccree/ssi_ivgen.c
index 1bb6f8919101..db4b831e82a3 100644
--- a/drivers/staging/ccree/ssi_ivgen.c
+++ b/drivers/staging/ccree/ssi_ivgen.c
@@ -26,7 +26,8 @@
 /* The max. size of pool *MUST* be <= SRAM total size */
 #define SSI_IVPOOL_SIZE 1024
 /* The first 32B fraction of pool are dedicated to the
-   next encryption "key" & "IV" for pool regeneration */
+ * next encryption "key" & "IV" for pool regeneration
+ */
 #define SSI_IVPOOL_META_SIZE (CC_AES_IV_SIZE + AES_KEYSIZE_128)
 #define SSI_IVPOOL_GEN_SEQ_LEN	4
 
@@ -278,7 +279,8 @@ int ssi_ivgen_getiv(
 	}
 
 	/* Bypass operation is proceeded by crypto sequence, hence must
-	*  assure bypass-write-transaction by a memory barrier */
+	 *  assure bypass-write-transaction by a memory barrier
+	 */
 	HW_DESC_INIT(&iv_seq[idx]);
 	HW_DESC_SET_DIN_NO_DMA(&iv_seq[idx], 0, 0xfffff0);
 	HW_DESC_SET_DOUT_NO_DMA(&iv_seq[idx], 0, 0, 1);
-- 
2.12.2

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