linux-kernel - [PATCH 3/3] x86/mce/AMD: Use saved threshold block info in interrupt handler

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <1495658507-7413-3-git-send-email-Yazen.Ghannam@amd.com>
Date:   Wed, 24 May 2017 15:41:47 -0500
From:   Yazen Ghannam <Yazen.Ghannam@....com>
To:     <linux-edac@...r.kernel.org>
CC:     Borislav Petkov <bp@...e.de>, Tony Luck <tony.luck@...el.com>,
        <x86@...nel.org>, <linux-kernel@...r.kernel.org>,
        Yazen Ghannam <yazen.ghannam@....com>
Subject: [PATCH 3/3] x86/mce/AMD: Use saved threshold block info in interrupt handler

From: Yazen Ghannam <yazen.ghannam@....com>

In the amd_threshold_interrupt() handler, we loop through every possible
block in each bank and rediscover the block's address and if it's valid,
e.g. valid, counter present and not locked. However, we already have the
address saved in the threshold blocks list for each CPU and bank. The list
only contains blocks that have passed all the valid checks.

Besides the redundancy, there's also an smp_call_function* in
get_block_address() and this causes a warning when servicing the interrupt.

 WARNING: CPU: 0 PID: 0 at kernel/smp.c:281 smp_call_function_single+0xdd/0xf0
 ...
 Call Trace:
  <IRQ>
  rdmsr_safe_on_cpu+0x5d/0x90
  get_block_address.isra.2+0x97/0x100
  amd_threshold_interrupt+0xae/0x220
  smp_threshold_interrupt+0x1b/0x40
  threshold_interrupt+0x89/0x90

Iterate over the threshold blocks list and use the saved address. Also,
drop the redundant valid checks.

Signed-off-by: Yazen Ghannam <yazen.ghannam@....com>
---
 arch/x86/kernel/cpu/mcheck/mce_amd.c | 27 ++++++++++-----------------
 1 file changed, 10 insertions(+), 17 deletions(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 2074b870..14e4dab 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -873,30 +873,23 @@ static void log_error_thresholding(unsigned int bank, u64 misc)
  */
 static void amd_threshold_interrupt(void)
 {
-	u32 low = 0, high = 0, address = 0;
-	unsigned int bank, block, cpu = smp_processor_id();
+	u32 low = 0, high = 0;
+	unsigned int bank, cpu = smp_processor_id();
 	struct thresh_restart tr;
+	struct threshold_block *block = NULL, *tmp = NULL;
+	struct list_head *head = NULL;
 
 	for (bank = 0; bank < mca_cfg.banks; ++bank) {
 		if (!(per_cpu(bank_map, cpu) & (1 << bank)))
 			continue;
-		for (block = 0; block < NR_BLOCKS; ++block) {
-			address = get_block_address(cpu, address, low, high, bank, block);
-			if (!address)
-				break;
 
-			if (rdmsr_safe(address, &low, &high))
-				break;
+		if (!per_cpu(threshold_banks, cpu)[bank]->blocks)
+			continue;
 
-			if (!(high & MASK_VALID_HI)) {
-				if (block)
-					continue;
-				else
-					break;
-			}
+		head = &per_cpu(threshold_banks, cpu)[bank]->blocks_head;
 
-			if (!(high & MASK_CNTP_HI)  ||
-			     (high & MASK_LOCKED_HI))
+		list_for_each_entry_safe(block, tmp, head, miscj) {
+			if (rdmsr_safe(block->address, &low, &high))
 				continue;
 
 			if (!(high & MASK_OVERFLOW_HI))
@@ -907,7 +900,7 @@ static void amd_threshold_interrupt(void)
 
 			/* Reset threshold block after logging error. */
 			memset(&tr, 0, sizeof(tr));
-			tr.b = &per_cpu(threshold_banks, cpu)[bank]->blocks[block];
+			tr.b = block;
 			threshold_restart_bank(&tr);
 		}
 	}
-- 
2.7.4