linux-kernel - [PATCH v3 0/4] iio: adc: sama5d2

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-ID: <1495711034-28410-1-git-send-email-eugen.hristev@microchip.com>
Date:   Thu, 25 May 2017 14:17:10 +0300
From:   Eugen Hristev <eugen.hristev@...rochip.com>
To:     <nicolas.ferre@...rochip.com>, <alexandre.belloni@...rochip.com>,
        <linux-iio@...r.kernel.org>, <lars@...afoo.de>,
        <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <ludovic.desroches@...rochip.com>, <jic23@...nel.org>
CC:     <eugen.hristev@...rochip.com>
Subject: [PATCH v3 0/4] iio: adc: sama5d2_adc hw triggers and buffers

This patch implements the hardware triggers support and buffer management
for sama5d2.
The DT modifications ( [PATCH 1/3] ARM: dts: at91: sama5d2_xplained:
enable ADTRG pin) are for demonstration purposes of the feature,
setting the pinctrl for the ADC hw trigger pin,should go through
at91 maintainers.
As discussed on the mailing list, since we have a single external trigger
namely the ADTRG, but three different possible edges that can trigger it,
will have a single trigger in the IIO subsystem and three possible edges
which can be selected from the device tree.
Thus I created new bindings in the device tree for having the possible
edge types for the ADTRG pin.
The documentation for the bindings is in the patch
[PATCH v3 2/4] Documentation: dt: iio: at91-sama5d2_adc: add adtrg
 trigger binding
The modifications in the DT are in the patch
[PATCH v3 3/4] ARM: dts: at91: sama5d2: add ADC hw trigger

  Changes in v3:
 - No longer have all three possible triggers registered in the subsystem and
   available in the sysfs. Only registering one trigger, and the possible edge
   is being read from the device tree. In the device tree, any possible edge
   can be set. There are three already made nodes for each possible edge which
   can be selected.
 - Fixed a bug where software triggered conversion could be started even if
   the hardware trigger was enabled.
 - Preallocate enough space for the buffer, considering all the channels
   and timestamp



  Changes in v2:
 - Moved buffer allocation and freeing into the preenable and postdisable
   callbacks.
   We have a total of scan bytes that can vary a lot depending on each channel
   enabled at a certain point.
 - made the at91 trigger list part of state structure
 - made the iio trigger list preallocated in state structure
 - moved irq enabling/disabling into the try_reenable callback
 - on trigger disable must write disable registries as well
 - Modified trigger name length to 64



Eugen Hristev (4):
  ARM: dts: at91: sama5d2_xplained: enable ADTRG pin
  Documentation: dt: iio: at91-sama5d2_adc: add adtrg trigger binding
  ARM: dts: at91: sama5d2: add ADC hw trigger
  iio: adc: at91-sama5d2_adc: add hw trigger and buffer support

 .../bindings/iio/adc/at91-sama5d2_adc.txt          |  17 ++
 arch/arm/boot/dts/at91-sama5d2_xplained.dts        |  16 +-
 arch/arm/boot/dts/sama5d2.dtsi                     |  11 +
 drivers/iio/adc/at91-sama5d2_adc.c                 | 229 ++++++++++++++++++++-
 4 files changed, 267 insertions(+), 6 deletions(-)

-- 
2.7.4