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Message-ID: <99B4C6BADD9E3241B25E52B02BA737C54116D871@DGGEMA505-MBX.china.huawei.com>
Date:   Fri, 26 May 2017 01:40:45 +0000
From:   songxiaowei <songxiaowei@...ilicon.com>
To:     Rob Herring <robh@...nel.org>
CC:     "Wangzhou (B)" <wangzhou1@...ilicon.com>,
        Gabriele Paoloni <gabriele.paoloni@...wei.com>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "xuwei (O)" <xuwei5@...ilicon.com>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
        "will.deacon@....com" <will.deacon@....com>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Chenfeng (puck)" <puck.chen@...ilicon.com>,
        "guodong.xu@...aro.org" <guodong.xu@...aro.org>,
        Wangbinghui <wangbinghui@...ilicon.com>,
        Suzhuangluan <suzhuangluan@...ilicon.com>
Subject: 答复: 答复: [Patch v3 1/3] arm64: dts: hi3660: add pcie node



-----邮件原件-----
发件人: Rob Herring [mailto:robh@...nel.org] 
发送时间: 2017年5月25日 20:39
收件人: songxiaowei
抄送: Wangzhou (B); Gabriele Paoloni; bhelgaas@...gle.com; mark.rutland@....com; xuwei (O); catalin.marinas@....com; will.deacon@....com; linux-pci@...r.kernel.org; devicetree@...r.kernel.org; linux-kernel@...r.kernel.org; Chenfeng (puck); guodong.xu@...aro.org; Wangbinghui; Suzhuangluan
主题: Re: 答复: [Patch v3 1/3] arm64: dts: hi3660: add pcie node

On Tue, May 23, 2017 at 8:39 PM, songxiaowei <songxiaowei@...ilicon.com> wrote:
> -----邮件原件-----
> 发件人: Rob Herring [mailto:robh@...nel.org]
> 发送时间: 2017年5月23日 22:17
> 收件人: songxiaowei
> 抄送: Wangzhou (B); Gabriele Paoloni; bhelgaas@...gle.com; mark.rutland@....com; xuwei (O); catalin.marinas@....com; will.deacon@....com; linux-pci@...r.kernel.org; devicetree@...r.kernel.org; linux-kernel@...r.kernel.org; Chenfeng (puck); guodong.xu@...aro.org; Wangbinghui; Suzhuangluan
> 主题: Re: [Patch v3 1/3] arm64: dts: hi3660: add pcie node
>
> On Thu, May 18, 2017 at 03:49:46PM +0800, Song Xiaowei wrote:
>> Add PCIe node for hi3660, and add binding documentation.
>>
>> Cc: Guodong Xu <guodong.xu@...aro.org>
>> Signed-off-by: Song Xiaowei <songxiaowei@...ilicon.com>
>> ---
>>  .../devicetree/bindings/pci/hisilicon-pcie.txt     | 52 ++++++++++++++++++++++
>>  arch/arm64/boot/dts/hisilicon/hi3660.dtsi          | 31 +++++++++++++

[...]

>> +  "config": PCIe configuration space registers.
>> +- reset-gpio: perst assert/deassert gpio
>
> reset-gpios
> [songxiaowei] rest-gpio is used to signal 'pcie perst': high level refers to deassert
>              and low level refers to assert. So, I think ' reset-gpio: creates perst assert/deassert signal '
>                         would be a better choice.

What I was saying is the name should be reset-gpios, not reset-gpio.

[songxiaowei] Ok, I'll fix it. In fact, perst signal only use one line, so reset-gpios contains only one gpio.
Rob

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