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Message-ID: <mhng-ecd1c0eb-bdd1-4315-b34d-e267a3b84a73@palmer-si-x1c4>
Date: Fri, 26 May 2017 17:57:16 -0700 (PDT)
From: Palmer Dabbelt <palmer@...belt.com>
To: Arnd Bergmann <arnd@...db.de>
CC: albert@...ive.com
Subject: Re: [PATCH 3/7] RISC-V: Device Tree Documentation
On Tue, 23 May 2017 05:03:17 PDT (-0700), Arnd Bergmann wrote:
> On Tue, May 23, 2017 at 2:41 AM, Palmer Dabbelt <palmer@...belt.com> wrote:
>> ---
>> .../interrupt-controller/riscv,cpu-intc.txt | 46 ++++++++++++++++++++++
>> .../bindings/interrupt-controller/riscv,plic0.txt | 44 +++++++++++++++++++++
>
> The patch needs a description, and should be sent to the irqchip maintainers
> and the devicetree maintainers for review, along for the respective
> drivers/irqchip/
> patch.
OK, I'll include that as part of my v2.
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