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Date: Tue, 30 May 2017 11:14:08 +0200 From: Benoît Thébaudeau <benoit@...stem.com> To: linux-kernel@...r.kernel.org, linux-mmc@...r.kernel.org Cc: Ulf Hansson <ulf.hansson@...aro.org>, Adrian Hunter <adrian.hunter@...el.com>, Fabio Estevam <fabio.estevam@....com>, Wolfram Sang <wsa@...-dreams.de>, Benoît Thébaudeau <benoit@...stem.com> Subject: [PATCH v3 2/5] mmc: sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR The eSDHC can only DMA from 32-bit-aligned addresses. This fixes the following test cases of mmc_test: 11: Badly aligned write 12: Badly aligned read 13: Badly aligned multi-block write 14: Badly aligned multi-block read Signed-off-by: Benoît Thébaudeau <benoit@...stem.com> Acked-by: Adrian Hunter <adrian.hunter@...el.com> Reviewed-by: Fabio Estevam <fabio.estevam@....com> --- Changes v1 -> v2: none. Changes v2 -> v3: none. --- drivers/mmc/host/sdhci-esdhc.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h index c4bbd74..e7893f2 100644 --- a/drivers/mmc/host/sdhci-esdhc.h +++ b/drivers/mmc/host/sdhci-esdhc.h @@ -19,6 +19,7 @@ */ #define ESDHC_DEFAULT_QUIRKS (SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \ + SDHCI_QUIRK_32BIT_DMA_ADDR | \ SDHCI_QUIRK_NO_BUSY_IRQ | \ SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \ SDHCI_QUIRK_PIO_NEEDS_DELAY | \ -- 2.7.4
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