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Message-ID: <20170530103905.GC7177@leoy-ThinkPad-T440>
Date:   Tue, 30 May 2017 18:39:05 +0800
From:   Leo Yan <leo.yan@...aro.org>
To:     Jonathan Corbet <corbet@....net>,
        Mathieu Poirier <mathieu.poirier@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Wei Xu <xuwei5@...ilicon.com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        Andy Gross <andy.gross@...aro.org>,
        David Brown <david.brown@...aro.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
        Stephen Boyd <sboyd@...eaurora.org>,
        Mike Leach <mike.leach@...aro.org>
Subject: Re: [PATCH v13 8/9] arm64: dts: hi6220: register debug module

Hi Wei,

On Thu, May 25, 2017 at 11:57:15PM +0800, Leo Yan wrote:
> Bind debug module driver for Hi6220.

Could you ACK this patch? From Mathieu's previous suggestion, after
your confirmation he could pick up this patch.

If you want me to send a separate patch to you directly, also is okay.
Please let me know which is preferring.

Thanks,
Leo Yan

> Reviewed-by: Mathieu Poirier <mathieu.poirier@...aro.org>
> Signed-off-by: Leo Yan <leo.yan@...aro.org>
> ---
>  arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 64 +++++++++++++++++++++++++++++++
>  1 file changed, 64 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> index 1e5129b..21805b9 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> @@ -916,5 +916,69 @@
>  				};
>  			};
>  		};
> +
> +		debug@...90000 {
> +			compatible = "arm,coresight-cpu-debug","arm,primecell";
> +			reg = <0 0xf6590000 0 0x1000>;
> +			clocks = <&sys_ctrl HI6220_DAPB_CLK>;
> +			clock-names = "apb_pclk";
> +			cpu = <&cpu0>;
> +		};
> +
> +		debug@...92000 {
> +			compatible = "arm,coresight-cpu-debug","arm,primecell";
> +			reg = <0 0xf6592000 0 0x1000>;
> +			clocks = <&sys_ctrl HI6220_DAPB_CLK>;
> +			clock-names = "apb_pclk";
> +			cpu = <&cpu1>;
> +		};
> +
> +		debug@...94000 {
> +			compatible = "arm,coresight-cpu-debug","arm,primecell";
> +			reg = <0 0xf6594000 0 0x1000>;
> +			clocks = <&sys_ctrl HI6220_DAPB_CLK>;
> +			clock-names = "apb_pclk";
> +			cpu = <&cpu2>;
> +		};
> +
> +		debug@...96000 {
> +			compatible = "arm,coresight-cpu-debug","arm,primecell";
> +			reg = <0 0xf6596000 0 0x1000>;
> +			clocks = <&sys_ctrl HI6220_DAPB_CLK>;
> +			clock-names = "apb_pclk";
> +			cpu = <&cpu3>;
> +		};
> +
> +		debug@...d0000 {
> +			compatible = "arm,coresight-cpu-debug","arm,primecell";
> +			reg = <0 0xf65d0000 0 0x1000>;
> +			clocks = <&sys_ctrl HI6220_DAPB_CLK>;
> +			clock-names = "apb_pclk";
> +			cpu = <&cpu4>;
> +		};
> +
> +		debug@...d2000 {
> +			compatible = "arm,coresight-cpu-debug","arm,primecell";
> +			reg = <0 0xf65d2000 0 0x1000>;
> +			clocks = <&sys_ctrl HI6220_DAPB_CLK>;
> +			clock-names = "apb_pclk";
> +			cpu = <&cpu5>;
> +		};
> +
> +		debug@...d4000 {
> +			compatible = "arm,coresight-cpu-debug","arm,primecell";
> +			reg = <0 0xf65d4000 0 0x1000>;
> +			clocks = <&sys_ctrl HI6220_DAPB_CLK>;
> +			clock-names = "apb_pclk";
> +			cpu = <&cpu6>;
> +		};
> +
> +		debug@...d6000 {
> +			compatible = "arm,coresight-cpu-debug","arm,primecell";
> +			reg = <0 0xf65d6000 0 0x1000>;
> +			clocks = <&sys_ctrl HI6220_DAPB_CLK>;
> +			clock-names = "apb_pclk";
> +			cpu = <&cpu7>;
> +		};
>  	};
>  };
> -- 
> 2.7.4
> 

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