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Message-ID: <1fb18947-33e8-abc9-e78f-970e702af3ee@arm.com>
Date: Tue, 30 May 2017 15:02:34 +0100
From: Marc Zyngier <marc.zyngier@....com>
To: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
Thomas Gleixner <tglx@...utronix.de>,
Jason Cooper <jason@...edaemon.net>,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
Rob Herring <robh+dt@...nel.org>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Kumar Gala <galak@...eaurora.org>,
Andrew Lunn <andrew@...n.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Gregory Clement <gregory.clement@...e-electrons.com>
Cc: linux-arm-kernel@...ts.infradead.org,
Nadav Haklai <nadavh@...vell.com>,
Hanna Hawa <hannah@...vell.com>,
Yehuda Yitschak <yehuday@...vell.com>,
Antoine Tenart <antoine.tenart@...e-electrons.com>
Subject: Re: [PATCH 6/6] arm64: dts: marvell: enable GICP and ICU on Armada
7K/8K
On 30/05/17 10:16, Thomas Petazzoni wrote:
> This commit modifies the Marvell EBU Armada 7K and 8K Device Tree files
> to describe the ICU and GICP units, and use ICU interrupts for all
> devices in the CP110 blocks.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
> ---
> arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 5 ++
> .../boot/dts/marvell/armada-cp110-master.dtsi | 60 +++++++++++++---------
> .../arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 54 ++++++++++---------
> 3 files changed, 71 insertions(+), 48 deletions(-)
>
[...]
> @@ -221,13 +229,13 @@
> cps_crypto: crypto@...000 {
> compatible = "inside-secure,safexcel-eip197";
> reg = <0x800000 0x200000>;
> - interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING
> + interrupts = <ICU_GRP_NSR 87 (IRQ_TYPE_EDGE_RISING
> | IRQ_TYPE_LEVEL_HIGH)>,
I've already mentioned this in a separate thread to Antoine, but it'd be
good to fix this non-sensical configuration.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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