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Message-ID: <20170530171853.64630ce6@gmail.com>
Date: Tue, 30 May 2017 17:18:53 +0200
From: Ralph Sennhauser <ralph.sennhauser@...il.com>
To: Richard Genoud <richard.genoud@...il.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Alexandre Courbot <gnurou@...il.com>,
Andrew Lunn <andrew@...n.ch>,
Gregory Clement <gregory.clement@...e-electrons.com>,
Jason Cooper <jason@...edaemon.net>,
linux-arm-kernel@...ts.infradead.org, linux-gpio@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-pwm@...r.kernel.org,
Mark Rutland <mark.rutland@....com>,
Rob Herring <robh+dt@...nel.org>,
Russell King <linux@...linux.org.uk>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Thierry Reding <thierry.reding@...il.com>
Subject: Re: [PATCH 1/2] gpio: mvebu: fix blink counter register selection
Hi Richard
On Tue, 30 May 2017 14:28:47 +0200
Richard Genoud <richard.genoud@...il.com> wrote:
> The blink counter A was always selected because 0 was forced in the
> blink select counter register.
> The variable 'set' was obviously there to be used as the register
> value, selecting the B counter when id==1 and A counter when id==0.
>
> Tested on clearfog-pro (Marvell 88F6828)
As stated in the other thread, testing on clearfog-pro is likely bogus,
still the fix is correct.
Reviewed-by: Ralph Sennhauser <ralph.sennhauser@...il.com>
Thanks
Ralph
>
> Signed-off-by: Richard Genoud <richard.genoud@...il.com>
> ---
> drivers/gpio/gpio-mvebu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
> index 19a92efabbef..cdef2c78cb3b 100644
> --- a/drivers/gpio/gpio-mvebu.c
> +++ b/drivers/gpio/gpio-mvebu.c
> @@ -747,7 +747,7 @@ static int mvebu_pwm_probe(struct platform_device
> *pdev, set = U32_MAX;
> else
> return -EINVAL;
> - writel_relaxed(0,
> mvebu_gpioreg_blink_counter_select(mvchip));
> + writel_relaxed(set,
> mvebu_gpioreg_blink_counter_select(mvchip));
> mvpwm = devm_kzalloc(dev, sizeof(struct mvebu_pwm),
> GFP_KERNEL); if (!mvpwm)
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