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Message-Id: <20170530215139.9983-20-alexandre.belloni@free-electrons.com>
Date: Tue, 30 May 2017 23:51:00 +0200
From: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
To: Nicolas Ferre <nicolas.ferre@...rochip.com>
Cc: Boris Brezillon <boris.brezillon@...e-electrons.com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Subject: [PATCH 19/58] ARM: dts: at91: at91sam9g45: TC blocks are also simple-mfd and syscon devices
Add simple-mfd and syscon to the TC blocks to allow to register one of the
channels as clocksource properly at boot time. It also allows to use regmap
instead of tclib.
Signed-off-by: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
---
arch/arm/boot/dts/at91sam9g45.dtsi | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index e567d5fd3f9d..edb4d80e295a 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -405,7 +405,9 @@
};
tcb0: timer@...7c000 {
- compatible = "atmel,at91rm9200-tcb";
+ compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0xfff7c000 0x100>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
@@ -413,7 +415,9 @@
};
tcb1: timer@...d4000 {
- compatible = "atmel,at91rm9200-tcb";
+ compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0xfffd4000 0x100>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
--
2.11.0
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