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Message-Id: <c0439bf64b2eeef807b6197066dbf6118ca09b5e.1496266871.git.sathyanarayanan.kuppuswamy@linux.intel.com>
Date: Wed, 31 May 2017 15:37:16 -0700
From: sathyanarayanan.kuppuswamy@...ux.intel.com
To: gnurou@...il.com, heikki.krogerus@...ux.intel.com,
gregkh@...uxfoundation.org, linus.walleij@...aro.org,
edubezval@...il.com, dvhart@...radead.org, rui.zhang@...el.com,
lee.jones@...aro.org, andy@...radead.org
Cc: linux-gpio@...r.kernel.org, linux-pm@...r.kernel.org,
linux-usb@...r.kernel.org, linux-kernel@...r.kernel.org,
platform-driver-x86@...r.kernel.org, sathyaosid@...il.com,
Kuppuswamy Sathyanarayanan
<sathyanarayanan.kuppuswamy@...ux.intel.com>
Subject: [PATCH v5 8/8] platform/x86: intel_bxtwc_tmu: Remove first level irq unmask
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@...ux.intel.com>
Currently in WCOVE PMIC mfd driver, all second level irq chips
are chained to the respective first level irqs. So there is no
need for explicitly unmasking the first level irq in this
driver. This patches removes this level 1 irq unmask support.
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@...ux.intel.com>
Reviewed-by: Darren Hart (VMware) <dvhart@...radead.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@...il.com>
---
drivers/platform/x86/intel_bxtwc_tmu.c | 4 ----
1 file changed, 4 deletions(-)
Changes since v1:
* None
Changes since v2:
* Rebased on top of latest release.
Changes since v3:
* None
Changes since v4:
* Changed commit subject from "platform: x86:" "to platform/x86:"
diff --git a/drivers/platform/x86/intel_bxtwc_tmu.c b/drivers/platform/x86/intel_bxtwc_tmu.c
index e202abd..ea865d4 100644
--- a/drivers/platform/x86/intel_bxtwc_tmu.c
+++ b/drivers/platform/x86/intel_bxtwc_tmu.c
@@ -92,10 +92,6 @@ static int bxt_wcove_tmu_probe(struct platform_device *pdev)
}
wctmu->irq = virq;
- /* Enable TMU interrupts */
- regmap_update_bits(wctmu->regmap, BXTWC_MIRQLVL1,
- BXTWC_MIRQLVL1_MTMU, 0);
-
/* Unmask TMU second level Wake & System alarm */
regmap_update_bits(wctmu->regmap, BXTWC_MTMUIRQ_REG,
BXTWC_TMU_ALRM_MASK, 0);
--
2.7.4
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