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Message-ID: <11d288df-db08-6e14-98a8-1ce6d669c31b@microchip.com>
Date: Wed, 31 May 2017 12:02:04 +0300
From: m18063 <Claudiu.Beznea@...rochip.com>
To: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
CC: <nicolas.ferre@...el.com>, <boris.brezillon@...e-electrons.com>,
<robh+dt@...nel.org>, <pawel.moll@....com>, <mark.rutland@....com>,
<ijc+devicetree@...lion.org.uk>, <galak@...eaurora.org>,
<ludovic.desroches@...el.com>, <cyrille.pitchen@...el.com>,
<linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] ARM: dts: at91: sama5d2_xplained: add pwm controller
On 31.05.2017 11:50, Alexandre Belloni wrote:
> Hi,
>
> On 23/02/2017 at 10:49:17 +0200, Claudiu Beznea wrote:
>> Add pwm controller bindings for sam5d2_xplained
>> and enable it.
>>
>> Changes since v1:
>> - Correct the typo in patch subject.
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea@...rochip.com>
>> ---
>> arch/arm/boot/dts/at91-sama5d2_xplained_common.dtsi | 4 ++++
>> arch/arm/boot/dts/sama5d2.dtsi | 8 ++++++++
>> 2 files changed, 12 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained_common.dtsi b/arch/arm/boot/dts/at91-sama5d2_xplained_common.dtsi
>> index 9fc270f..493ea29 100644
>> --- a/arch/arm/boot/dts/at91-sama5d2_xplained_common.dtsi
>> +++ b/arch/arm/boot/dts/at91-sama5d2_xplained_common.dtsi
>> @@ -318,6 +318,10 @@
>> };
>> };
>>
>> + pwm0: pwm@...2c000 {
>> + status = "okay";
>> + };
>> +
>> flx0: flexcom@...34000 {
>> atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
>> status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
>
>
> This doesn't apply on v4.12-rc1, this file doesn't exist.
Sorry, I will resend it.
>
>> diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
>> index cd459e8..e88785e 100644
>> --- a/arch/arm/boot/dts/sama5d2.dtsi
>> +++ b/arch/arm/boot/dts/sama5d2.dtsi
>> @@ -1098,6 +1098,14 @@
>> status = "disabled";
>> };
>>
>> + pwm0: pwm@...2c000 {
>> + compatible = "atmel,sama5d2-pwm";
>> + reg = <0xf802c000 0x4000>;
>> + interrupts = <38 IRQ_TYPE_LEVEL_HIGH 7>;
>> + #pwm-cells = <3>;
>> + clocks = <&pwm_clk>;
>> + };
>> +
>> sfr: sfr@...30000 {
>> compatible = "atmel,sama5d2-sfr", "syscon";
>> reg = <0xf8030000 0x98>;
>> --
>> 2.7.4
>>
>
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