linux-kernel - Re: [PATCH 0/9] Add support for the pin controllers on the Marvell Armada 7K/8K

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Message-ID: <20170531111543.7c753308@free-electrons.com>
Date:   Wed, 31 May 2017 11:15:43 +0200
From:   Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
To:     Gregory CLEMENT <gregory.clement@...e-electrons.com>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
        Andrew Lunn <andrew@...n.ch>,
        Jason Cooper <jason@...edaemon.net>,
        devicetree@...r.kernel.org, Omri Itach <omrii@...vell.com>,
        Nadav Haklai <nadavh@...vell.com>,
        Kostya Porotchkin <kostap@...vell.com>,
        Russell King <rmk+kernel@...linux.org.uk>,
        Rob Herring <robh+dt@...nel.org>,
        Neta Zur Hershkovits <neta@...vell.com>,
        Shadi Ammouri <shadi@...vell.com>,
        Marcin Wojtas <mw@...ihalf.com>,
        linux-arm-kernel@...ts.infradead.org,
        Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
Subject: Re: [PATCH 0/9] Add support for the pin controllers on the Marvell
 Armada 7K/8K

Hello,

On Fri, 19 May 2017 18:04:42 +0200, Gregory CLEMENT wrote:

> Gregory CLEMENT (6):
>   MAINTAINERS: extend mvebu SoC entry with pinctrl drivers
>   pinctrl: dt-bindings: add documentation for AP806 pin controllers
>   pinctrl: dt-bindings: add documentation for CP110 pin controllers
>   pinctrl: mvebu: remove the offset property for regmap
>   arm64: marvell: enable the Armada 7K/8K pinctrl driver
>   arm64: dts: marvell: add pinctrl support for Armada 7K/8K
> 
> Hanna Hawa (2):
>   pinctrl: mvebu: add driver for Armada AP806 pinctrl
>   pinctrl: mvebu: add driver for Armada CP110 pinctrl
> 
> Russell King (1):
>   pinctrl: avoid PLAT_ORION dependency

I have tested the combination of your four series (touching clock,
pinmux and gpio) on Armada 8K MacchiatoBin, and I was able to validate
that the CP110 pinmuxing works as expected.

I used MPP37 and MPP38, which I was able to configure as GPIO or I2C0,
and validate that they are working as GPIOs and as I2C0.

I was however unable to test the AP MPPs due to the lack of access to
such pins.

Best regards,

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com