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Message-ID: <CAGXu5j+MKKSU+=VGmwamC0aekRKt+WDvpVpdmFce2br8YoecgA@mail.gmail.com>
Date: Wed, 31 May 2017 06:17:16 -0700
From: Kees Cook <keescook@...omium.org>
To: Peter Zijlstra <peterz@...radead.org>
Cc: LKML <linux-kernel@...r.kernel.org>,
Christoph Hellwig <hch@...radead.org>,
"Eric W. Biederman" <ebiederm@...ssion.com>,
Andrew Morton <akpm@...ux-foundation.org>,
Josh Poimboeuf <jpoimboe@...hat.com>,
PaX Team <pageexec@...email.hu>, Jann Horn <jannh@...gle.com>,
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David Windsor <dwindsor@...il.com>,
Greg KH <gregkh@...uxfoundation.org>,
Ingo Molnar <mingo@...hat.com>,
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Rik van Riel <riel@...hat.com>,
linux-arch <linux-arch@...r.kernel.org>,
"kernel-hardening@...ts.openwall.com"
<kernel-hardening@...ts.openwall.com>
Subject: Re: [PATCH v5 2/3] x86/asm: Add suffix macro for GEN_*_RMWcc()
On Wed, May 31, 2017 at 4:13 AM, Peter Zijlstra <peterz@...radead.org> wrote:
> On Tue, May 30, 2017 at 02:39:51PM -0700, Kees Cook wrote:
>> The coming x86 refcount protection needs to be able to add trailing
>> instructions to the GEN_*_RMWcc() operations. This extracts the
>> difference between the goto/non-goto cases so the helper macros
>> can be defined outside the #ifdef cases. Additionally adds argument
>> naming to the resulting asm for referencing from suffixed
>> instructions, and adds clobbers for "cc", and "cx" to let suffixes
>> use _ASM_CX, and retain any set flags.
>
> Another option is to simply require __GCC_ASM_FLAG_OUTPUT__ for the fast
> refcount stuff. That would result in simpler and more readable code.
What versions of GCC support that?
-Kees
--
Kees Cook
Pixel Security
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