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Message-ID: <20170601082804.GE20170@codeaurora.org>
Date: Thu, 1 Jun 2017 01:28:04 -0700
From: Stephen Boyd <sboyd@...eaurora.org>
To: Yuantian Tang <andy.tang@....com>
Cc: mturquette@...libre.com, robh+dt@...nel.org, mark.rutland@....com,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Scott Wood <oss@...error.net>
Subject: Re: [PATCH 2/2 v2] clk: qoriq: Separate root input clock for core
PLLs on ls1012a
On 03/20, Yuantian Tang wrote:
> From: Scott Wood <oss@...error.net>
>
> ls1012a has separate input root clocks for core PLLs versus the
> platform PLL, with the latter described as sysclk in the hw docs.
> If a second input clock, named "coreclk", is present, this clock will be
> used for the core PLLs.
>
> Signed-off-by: Scott Wood <oss@...error.net>
> Signed-off-by: Tang Yuantian <andy.tang@....com>
> Acked-by: Rob Herring <robh@...nel.org>
> ---
Applied to clk-next
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