linux-kernel - Re: [PATCH 4.4 030/103] drm/amdgpu: Make display watermark calculations more accurate

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Thu, 01 Jun 2017 12:13:39 +0100
From:   Ben Hutchings <ben.hutchings@...ethink.co.uk>
To:     Alex Deucher <alexander.deucher@....com>,
        Mario Kleiner <mario.kleiner.de@...il.com>
Cc:     linux-kernel@...r.kernel.org, stable@...r.kernel.org,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Subject: Re: [PATCH 4.4 030/103] drm/amdgpu: Make display watermark
 calculations more accurate

On Tue, 2017-05-23 at 22:08 +0200, Greg Kroah-Hartman wrote:
> 4.4-stable review patch.  If anyone has any objections, please let me know.
> 
> ------------------
> 
> From: Mario Kleiner <mario.kleiner.de@...il.com>
> 
> commit d63c277dc672e0c568481af043359420fa9d4736 upstream.
> 
> Avoid big roundoff errors in scanline/hactive durations for
> high pixel clocks, especially for >= 500 Mhz, and thereby
> program more accurate display fifo watermarks.
[...]
> --- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
> @@ -1237,14 +1237,14 @@ static void dce_v10_0_program_watermarks
>  {
>  	struct drm_display_mode *mode = &amdgpu_crtc->base.mode;
>  	struct dce10_wm_params wm_low, wm_high;
> -	u32 pixel_period;
> +	u32 active_time;
>  	u32 line_time = 0;
>  	u32 latency_watermark_a = 0, latency_watermark_b = 0;
>  	u32 tmp, wm_mask, lb_vblank_lead_lines = 0;
>  
>  	if (amdgpu_crtc->base.enabled && num_heads && mode) {
> -		pixel_period = 1000000 / (u32)mode->clock;
> -		line_time = min((u32)mode->crtc_htotal * pixel_period, (u32)65535);
> +		active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
> +		line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
[...]

Won't these multiplications overflow if a >4K display is attached to a
32-bit machine?

Ben.

-- 
Ben Hutchings
Software Developer, Codethink Ltd.