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Message-ID: <CAFGCpxzxQfC+mf6Ltjzq=rtk+1C_R2x0+eu3s+zszK58x0OS8Q@mail.gmail.com>
Date: Fri, 2 Jun 2017 17:01:18 +0800
From: Guodong Xu <guodong.xu@...aro.org>
To: Rob Herring <robh@...nel.org>
Cc: Lee Jones <lee.jones@...aro.org>,
Mark Rutland <mark.rutland@....com>,
"xuwei (O)" <xuwei5@...ilicon.com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>,
Kevin Hilman <khilman@...libre.com>,
Arnd Bergmann <arnd@...db.de>,
Gregory CLEMENT <gregory.clement@...e-electrons.com>,
Olof Johansson <olof@...om.net>,
Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
Masahiro Yamada <yamada.masahiro@...ionext.com>,
Riku Voipio <riku.voipio@...aro.org>,
Thierry Reding <treding@...dia.com>,
Krzysztof Kozlowski <krzk@...nel.org>,
Eric Anholt <eric@...olt.net>, damm+renesas@...nsource.se,
Ard Biesheuvel <ard.biesheuvel@...aro.org>,
Linus Walleij <linus.walleij@...aro.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
devicetree@...r.kernel.org,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
"hw Wang(Xiaoyin)" <hw.wangxiaoyin@...ilicon.com>
Subject: Re: [PATCH 1/6] dt-bindings: mfd: Add hi6421v530 bindings
On Thu, Jun 1, 2017 at 2:07 AM, Rob Herring <robh@...nel.org> wrote:
> On Fri, May 26, 2017 at 02:35:13PM +0800, Guodong Xu wrote:
>> DT bindings for hisilicon HI655x PMIC chip.
>>
>> Signed-off-by: Guodong Xu <guodong.xu@...aro.org>
>> ---
>> .../bindings/mfd/hisilicon,hi6421v530.txt | 25 ++++++++++++++++++++++
>> 1 file changed, 25 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt
>>
>> diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt
>> new file mode 100644
>> index 0000000..6ffe6f6
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt
>> @@ -0,0 +1,25 @@
>> +Hisilicon Hi6421v530 Power Management Integrated Circuit (PMIC)
>> +
>> +The hardware layout for access PMIC Hi6421v530 from AP SoC Hi3660.
>> +Between PMIC Hi6421v530 and Hi3660, the physical signal channel is SSI.
>> +We can use memory-mapped I/O to communicate.
>> +
>> ++----------------+ +-------------+
>> +| | | |
>> +| Hi3660 | SSI bus | Hi6421v530 |
>> +| |-------------| |
>> +| |(REGMAP_MMIO)| |
>> ++----------------+ +-------------+
>
> regmap is a Linuxism and should not be part of the binding.
>
> So there some sort of controller that generates SSI packets? based on
> MMIO addresses? That should be more fully described here. For example,
> the PMIC should probably be a child of the controller.
Hi, Rob
Thanks for review. I just sent v2 of this patchset, according to
review comments I got. In v2, I discarded this new binding file.
Actually, I extended the existing
Documentation/devicetree/bindings/mfd/hi6421.txt to make it support
v530. There is no regmap in that.
Yes, there is a controller to generate SSI packets. However that is
completely blind to main SoC. It's more MMIO.
-Guodong
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