[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20170604135229.GB7207@wunner.de>
Date: Sun, 4 Jun 2017 15:52:29 +0200
From: Lukas Wunner <lukas@...ner.de>
To: Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Andreas Noever <andreas.noever@...il.com>,
Michael Jamet <michael.jamet@...el.com>,
Yehezkel Bernat <yehezkel.bernat@...el.com>,
Amir Levy <amir.jer.levy@...el.com>,
Andy Lutomirski <luto@...nel.org>, Mario.Limonciello@...l.com,
Jared.Dominguez@...l.com,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 06/27] thunderbolt: Rework capability handling
On Fri, Jun 02, 2017 at 05:05:03PM +0300, Mika Westerberg wrote:
> Organization of the capabilities in switches and ports is not so random
> after all. Rework the capability handling functionality so that it
> follows how capabilities are organized and provide two new functions
> (tb_switch_find_vsec_cap() and tb_port_find_cap()) which can be used to
^^^^^^^^
I assume VSEC is the same acronym as in the PCIe spec, so this naming
scheme results in "vendor specific extended capability capability",
which is maybe a bit odd.
Thanks,
Lukas
Powered by blists - more mailing lists