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Date: Tue, 6 Jun 2017 15:08:50 +0200
From: Paolo Bonzini <pbonzini@...hat.com>
To: Peter Zijlstra <peterz@...radead.org>,
"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>
Cc: linux-kernel@...r.kernel.org, mingo@...nel.org,
jiangshanlai@...il.com, dipankar@...ibm.com,
akpm@...ux-foundation.org, mathieu.desnoyers@...icios.com,
josh@...htriplett.org, tglx@...utronix.de, rostedt@...dmis.org,
dhowells@...hat.com, edumazet@...gle.com, fweisbec@...il.com,
oleg@...hat.com, kvm@...r.kernel.org,
Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [PATCH RFC tip/core/rcu 1/2] srcu: Allow use of Tiny/Tree SRCU
from both process and interrupt context
On 06/06/2017 12:53, Peter Zijlstra wrote:
> On Mon, Jun 05, 2017 at 03:09:50PM -0700, Paul E. McKenney wrote:
>> There would be a slowdown if 1) fast this_cpu_inc is not available and
>> cannot be implemented (this usually means that atomic_inc has implicit
>> memory barriers),
>
> I don't get this.
>
> How is per-cpu crud related to being strongly ordered?
>
> this_cpu_ has 3 forms:
>
> x86: single instruction
> arm64,s390: preempt_disable()+atomic_op
> generic: local_irq_save()+normal_op
>
> Only s390 is TSO, arm64 is very much a weak arch.
Right, and thus arm64 can implement a fast this_cpu_inc using LL/SC.
s390 cannot because its atomic_inc has implicit memory barriers.
s390's this_cpu_inc is *faster* than the generic one, but still pretty slow.
>> and 2) local_irq_save/restore is slower than disabling
>> preemption. The main architecture with these constraints is s390, which
>> however is already paying the price in __srcu_read_unlock and has not
>> complained.
>
> IIRC only PPC (and hopefully soon x86) has a local_irq_save() that is as
> fast as preempt_disable().
1 = arch-specific this_cpu_inc is available
2 = local_irq_save/restore as fast as preempt_disable/enable
If either 1 or 2 are true, this patch makes SRCU faster or equal
x86 (single instruction): 1 = true, 2 = false -> ok
arm64 (weakly ordered): 1 = true, 2 = false -> ok
powerpc: 1 = false, 2 = true -> ok
s390: 1 = false, 2 = false -> slower
For other LL/SC architectures, notably arm, fast this_cpu_* ops not yet
available, but could be written pretty easily.
>> A valid optimization on s390 would be to skip the smp_mb;
>> AIUI, this_cpu_inc implies a memory barrier (!) due to its implementation.
>
> You mean the s390 this_cpu_inc() in specific, right? Because
> this_cpu_inc() in general does not imply any such thing.
Yes, of course, this is only for s390.
Alternatively, we could change the counters to atomic_t and use
smp_mb__{before,after}_atomic, as in the (unnecessary) srcutiny patch.
That should shave a few cycles on x86 too, since "lock inc" is faster
than "inc; mfence". For srcuclassic (and stable) however I'd rather
keep the simple __this_cpu_inc -> this_cpu_inc change.
Paolo
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