linux-kernel - Re: [PATCH] clk: socfpga: Fix the smplsel on Arria10 and Stratix10

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Message-ID: <20170607174516.GN20170@codeaurora.org>
Date:   Wed, 7 Jun 2017 10:45:16 -0700
From:   Stephen Boyd <sboyd@...eaurora.org>
To:     Dinh Nguyen <dinguyen@...nel.org>
Cc:     linux-clk@...r.kernel.org, mturquette@...libre.com,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: socfpga: Fix the smplsel on Arria10 and Stratix10

On 06/07, Dinh Nguyen wrote:
> The smplsel bits for the SDMMC clock on Arria10 and Stratix10 platforms are
> offset by 1 additional bit.
> 
> Add a new macro SYSMGR_SDMMC_CTRL_SET_AS10 for usage on the Arria10 and
> Stratix10 platforms.
> 
> Signed-off-by: Dinh Nguyen <dinguyen@...nel.org>

Some sort of Fixes: tag as well?

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