linux-kernel - [PATCH 01/15] clk: ingenic: Fix recalc

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Date:   Wed,  7 Jun 2017 22:04:25 +0200
From:   Paul Cercueil <paul@...pouillou.net>
To:     Ralf Baechle <ralf@...ux-mips.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...eaurora.org>,
        Rob Herring <robh+dt@...nel.org>
Cc:     Paul Burton <paul.burton@...tec.com>,
        Maarten ter Huurne <maarten@...ewalker.org>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-mips@...ux-mips.org, linux-clk@...r.kernel.org,
        Paul Cercueil <paul@...pouillou.net>
Subject: [PATCH 01/15] clk: ingenic: Fix recalc_rate for clocks with fixed divider

Previously, the clocks with a fixed divider would report their rate
as being the same as the one of their parent, independently of the
divider in use. This commit fixes this behaviour.

This went unnoticed as neither the jz4740 nor the jz4780 CGU code
have clocks with fixed dividers yet.

Signed-off-by: Paul Cercueil <paul@...pouillou.net>
---
 drivers/clk/ingenic/cgu.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c
index e8248f9185f7..eb9002ccf3fc 100644
--- a/drivers/clk/ingenic/cgu.c
+++ b/drivers/clk/ingenic/cgu.c
@@ -328,6 +328,8 @@ ingenic_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
 		div *= clk_info->div.div;
 
 		rate /= div;
+	} else if (clk_info->type & CGU_CLK_FIXDIV) {
+		rate /= clk_info->fixdiv.div;
 	}
 
 	return rate;
-- 
2.11.0