linux-kernel - Re: [PATCHv3 1/4] ARM: dts: socfpga: Add Altera I2C Controller to CycloneV

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Message-ID: <b5b5dd02-9c07-1ecd-086d-ef668f280514@linux.intel.com>
Date:   Wed, 7 Jun 2017 15:45:50 -0500
From:   Thor Thayer <thor.thayer@...ux.intel.com>
To:     Steffen Trumtrar <s.trumtrar@...gutronix.de>
Cc:     wsa@...-dreams.de, robh+dt@...nel.org, mark.rutland@....com,
        dinguyen@...nel.org, davem@...emloft.net,
        gregkh@...uxfoundation.org, mchehab@...nel.org,
        linux-i2c@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCHv3 1/4] ARM: dts: socfpga: Add Altera I2C Controller to
 CycloneV

Hi Steffen,

On 06/06/2017 01:40 AM, Steffen Trumtrar wrote:
> 
> Hi!
> 
> thor.thayer@...ux.intel.com writes:
> 
>> From: Thor Thayer <thor.thayer@...ux.intel.com>
>>
>> Add the Altera I2C Controller to the CycloneV SoCFPGA device tree.
>>
>> Signed-off-by: Thor Thayer <thor.thayer@...ux.intel.com>
>> ---
>> v2  Remove altr, from fifo-size.
>>      Rename compatible string to "altr,softip-i2c"
>> v3  Add version to commpatible string "altr,softip-i2c-v1.0"
>> ---
>>   arch/arm/boot/dts/socfpga.dtsi               | 13 ++++++++++---
>>   arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | 28 +++++++++++++++++++++++++++-
>>   2 files changed, 37 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
>> index b2674bd..d69c13d 100644
>> --- a/arch/arm/boot/dts/socfpga.dtsi
>> +++ b/arch/arm/boot/dts/socfpga.dtsi
>> @@ -133,6 +133,13 @@
>>   					#address-cells = <1>;
>>   					#size-cells = <0>;
>>   
>> +					clk_0: clk_0 {
>> +						compatible = "fixed-clock";
>> +						#clock-cells = <0>;
>> +						clock-frequency = <50000000>;
>> +						clock-output-names = "clk_0-clk";
>> +					};
>> +
>>   					osc1: osc1 {
>>   						#clock-cells = <0>;
>>   						compatible = "fixed-clock";
>> @@ -529,11 +536,11 @@
>>   				};
>>   		};
>>   
>> -		fpga_bridge0: fpga_bridge@...00000 {
>> +		fpga_bridge0: fpga_bridge@...00000 {
>>   			compatible = "altr,socfpga-lwhps2fpga-bridge";
>> -			reg = <0xff400000 0x100000>;
>> +			reg = <0xff200000 0x00200000>;
>>   			resets = <&rst LWHPS2FPGA_RESET>;
>> -			clocks = <&l4_main_clk>;
>> +			clocks = <&clk_0>;
>>   		};
>>
> 
> Why this change? This looks wrong and unrelated. The LWHPS2FPGA bridge
> is at 0xff400000, so it is correct the way it is or not?
> 
Yes, good point. I was using the LWHPS2FPGA slave bus so I shouldn't 
change this one. I'll add the slave version.

Thanks,

Thor
>>   		fpga_bridge1: fpga_bridge@...00000 {
>> diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
>> index 155829f..f99576b 100644
>> --- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
>> +++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
>> @@ -68,6 +68,7 @@
>>   		regulator-min-microvolt = <3300000>;
>>   		regulator-max-microvolt = <3300000>;
>>   	};
>> +
>>   };
> 
> ???
> 
Whoops. I should remove the extra space. Thanks!

> 
> (...)
> 
> 
> Best regards,
> Steffen
>