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Message-ID: <20170608200041.GB8337@worktop.programming.kicks-ass.net>
Date: Thu, 8 Jun 2017 22:00:41 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Dave Hansen <dave.hansen@...ux.intel.com>
Cc: linux-kernel@...r.kernel.org, tony.luck@...el.com,
tim.c.chen@...ux.intel.com, bp@...en8.de, rientjes@...gle.com,
imammedo@...hat.com, torvalds@...ux-foundation.org,
prarit@...hat.com, toshi.kani@...com, brice.goglin@...il.com,
hpa@...ux.intel.com, mingo@...nel.org
Subject: Re: [PATCH] x86, sched: allow topolgies where NUMA nodes share an LLC
On Thu, Jun 08, 2017 at 12:39:28PM -0700, Dave Hansen wrote:
>
> From: Dave Hansen <dave.hansen@...ux.intel.com>
>
> Our SMP boot code has a series of assumptions about what NUMA
> nodes are that are enforced via topology_sane(). Once upon a
> time, we verified that a CPU package only contained a single node
> (fixed in cebf15eb0). Today, we verify that SMT siblings and
> LLCs do not span nodes.
>
> The SMT siblings assumption is safe, but the LLC is violated on
> current hardware.
What does? That does sound broken. How can a cache domain sanely span
memory controllers?
This needs far more explanation.
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