| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <87lgp2pft0.fsf@free-electrons.com>
Date: Thu, 08 Jun 2017 19:09:15 +0200
From: Gregory CLEMENT <gregory.clement@...e-electrons.com>
To: linux-arm-kernel@...ts.infradead.org
Cc: Mike Turquette <mturquette@...libre.com>,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
Andrew Lunn <andrew@...n.ch>,
Jason Cooper <jason@...edaemon.net>,
devicetree@...r.kernel.org, Omri Itach <omrii@...vell.com>,
Nadav Haklai <nadavh@...vell.com>,
Kostya Porotchkin <kostap@...vell.com>,
Rob Herring <robh+dt@...nel.org>,
Neta Zur Hershkovits <neta@...vell.com>,
Shadi Ammouri <shadi@...vell.com>,
Marcin Wojtas <mw@...ihalf.com>,
Stephen Boyd <sboyd@...eaurora.org>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
Subject: Re: [PATCH v2 7/7] arm64: dts: marvell: use new binding for the system controller on ap806
Hi,
On mer., mai 31 2017, Gregory CLEMENT <gregory.clement@...e-electrons.com> wrote:
> The new binding for the system controller on ap806 moved the clock into a
> subnode. This preliminary step will allow to add gpio and pinctrl
> subnodes
>
> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@...e-electrons.com>
Applied on mvebu/dt64
Gregory
> ---
> arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 19 +++++++++++--------
> 1 file changed, 11 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
> index 0c25ec62a2a3..205037e3e7dc 100644
> --- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
> @@ -193,7 +193,7 @@
> #size-cells = <0>;
> cell-index = <0>;
> interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&ap_syscon 3>;
> + clocks = <&ap_clk 3>;
> status = "disabled";
> };
>
> @@ -204,7 +204,7 @@
> #size-cells = <0>;
> interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> timeout-ms = <1000>;
> - clocks = <&ap_syscon 3>;
> + clocks = <&ap_clk 3>;
> status = "disabled";
> };
>
> @@ -214,7 +214,7 @@
> reg-shift = <2>;
> interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> reg-io-width = <1>;
> - clocks = <&ap_syscon 3>;
> + clocks = <&ap_clk 3>;
> status = "disabled";
> };
>
> @@ -224,7 +224,7 @@
> reg-shift = <2>;
> interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> reg-io-width = <1>;
> - clocks = <&ap_syscon 3>;
> + clocks = <&ap_clk 3>;
> status = "disabled";
>
> };
> @@ -234,17 +234,20 @@
> reg = <0x6e0000 0x300>;
> interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
> clock-names = "core";
> - clocks = <&ap_syscon 4>;
> + clocks = <&ap_clk 4>;
> dma-coherent;
> marvell,xenon-phy-slow-mode;
> status = "disabled";
> };
>
> ap_syscon: system-controller@...000 {
> - compatible = "marvell,ap806-system-controller",
> - "syscon";
> - #clock-cells = <1>;
> + compatible = "syscon", "simple-mfd";
> reg = <0x6f4000 0x1000>;
> +
> + ap_clk: clock {
> + compatible = "marvell,ap806-clock";
> + #clock-cells = <1>;
> + };
> };
> };
> };
> --
> git-series 0.9.1
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
Powered by blists - more mailing lists