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Message-ID: <3b4dda48-c403-88c4-5c89-63753f508d76@arm.com>
Date: Fri, 9 Jun 2017 16:36:09 +0100
From: Andre Przywara <andre.przywara@....com>
To: jagan@...nedev.com, maxime.ripard@...e-electrons.com,
Jagan Teki <jagannadh.teki@...il.com>
Cc: Chen-Yu Tsai <wens@...e.org>, Sean Wang <sean.wang@...iatek.com>,
Icenowy Zheng <icenowy@...c.io>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
Michael Trimarchi <michael@...rulasolutions.com>,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-sunxi@...glegroups.com,
Jagan Teki <jagan@...rulasolutions.com>
Subject: Re: [linux-sunxi] Re: [PATCH v2] arm64: allwinner: a64: Add initial
NanoPi A64 support
Hi,
On 09/06/17 16:26, Jagan Teki wrote:
> On Friday 09 June 2017 08:21 PM, Maxime Ripard wrote:
>> Hi Jagan,
>>
>> On Fri, Jun 09, 2017 at 12:40:52PM +0000, Jagan Teki wrote:
>>> +&i2c1 {
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&i2c1_pins>;
>>> + status = "okay";
>>> +};
>>> +
>>> +&i2c1_pins {
>>> + bias-pull-up;
>>> +};
>>
>> What is connected on that bus?
>
> i2c1 connected with gpio/i2s
Those are the I2C pins connected to the headers. We have them in the
other A64 DTs as well (Pine64, BananaPi).
If that is not the right approach, we should discuss this and keep it
consistent at least across the A64 boards.
>>
>>> +&uart1 {
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
>>> + status = "okay";
>>> +};
>>
>> And on that UART?
>
> uart1 for SDIO (Wifi connector, with RTS/CTS), this along with mmc1
To be precise, UART1 (with h/w handshake) is connected to the Bluetooth
part of the WiFi/BT chip, which is soldered on that board. Regardless of
the actual *WiFi* support state BT should work already - at least it did
when I tried this a few months ago on the Pine64 (although this involved
some userland heavy lifting).
Not sure what the approach here is in regard to the power supply and
wake-up GPIOs, shall they be described in this node as well or is that
up for userspace to control?
Cheers,
Andre.
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