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Message-ID: <20170614110141.GL16190@arm.com>
Date: Wed, 14 Jun 2017 12:01:41 +0100
From: Will Deacon <will.deacon@....com>
To: Mark Rutland <mark.rutland@....com>
Cc: John Garry <john.garry@...wei.com>,
Shaokun Zhang <zhangshaokun@...ilicon.com>,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
anurup.m@...wei.com, tanxiaojun@...wei.com, xuwei5@...ilicon.com,
sanil.kumar@...ilicon.com, gabriele.paoloni@...wei.com,
shiju.jose@...wei.com, huangdaode@...ilicon.com,
linuxarm@...wei.com, dikshit.n@...wei.com, shyju.pv@...wei.com,
anurupvasu@...il.com
Subject: Re: [PATCH v8 6/9] drivers: perf: hisi: Add support for Hisilicon
Djtag driver
On Wed, Jun 14, 2017 at 11:42:30AM +0100, Mark Rutland wrote:
> On Wed, Jun 14, 2017 at 11:06:58AM +0100, Will Deacon wrote:
> > Apologies, I misunderstood your algorithm (I thought step (a) was on one CPU
> > and step (b) was on another). Still, I don't understand the need for the
> > timeout. If you instead read back the flag immediately, wouldn't it still
> > work? e.g.
> >
> >
> > lock:
> > Readl_relaxed flag
> > if (locked)
> > goto lock;
> >
> > Writel_relaxed unique ID to flag
> > Readl flag
> > if (locked by somebody else)
> > goto lock;
> >
> > <critical section>
> >
> > unlock:
> > Writel unlocked value to flag
> >
> >
> > Given that we're dealing with iomem, I think it will work, but I could be
> > missing something obvious.
>
> Don't we have the race below where both threads can enter the critical
> section?
>
> // flag f initial zero (unlocked)
>
> // t1, flag 1 // t2, flag 2
> readl(f); // reads 0 l = readl(f); // reads 0
>
> <thinks lock is free> <thinks lock is free>
>
> writel(1, f);
> readl(f); // reads 1
> <thinks lock owned>
> writel(2, f);
> readl(f) // reads 2
> <thinks lock owned>
>
> <crticial section> <critical section>
Urgh, yeah, of course and *that's* what the udelay is trying to avoid,
by "ensuring" that the <thinks lock is free> time and subsequent write
propagation is all over before we re-read the flag.
John -- how much space do you have on this device? Do you have, e.g. a byte
for each CPU?
Will
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