linux-kernel - Re: [PATCH v3 2/3] drm/rockchip: dw_hdmi: introduce the VPLL clock setting

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20170614153521.fr75vwkbx65i56jf@rob-hp-laptop>
Date:   Wed, 14 Jun 2017 10:35:21 -0500
From:   Rob Herring <robh@...nel.org>
To:     Mark Yao <mark.yao@...k-chips.com>
Cc:     David Airlie <airlied@...ux.ie>,
        Mark Rutland <mark.rutland@....com>,
        Heiko Stuebner <heiko@...ech.de>,
        dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/3] drm/rockchip: dw_hdmi: introduce the VPLL clock
 setting

On Fri, Jun 09, 2017 at 03:10:41PM +0800, Mark Yao wrote:
> For RK3399 HDMI, there is an external clock need for HDMI PHY,
> and it should keep the same clock rate with VOP DCLK.
> 
> VPLL have supported the clock for HDMI PHY, but there is no
> clock divider bewteen VPLL and HDMI PHY. So we need to set the
> VPLL rate manually in HDMI driver.
> 
> Signed-off-by: Yakir Yang <ykk@...k-chips.com>
> Signed-off-by: Mark Yao <mark.yao@...k-chips.com>
> ---
> Changes in v3: none
> Changes in v2: describe vpll on Documentation.
> 
>  .../bindings/display/rockchip/dw_hdmi-rockchip.txt |  2 +-

Acked-by: Rob Herring <robh@...nel.org>

>  drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c        | 25 +++++++++++++++++++++-
>  2 files changed, 25 insertions(+), 2 deletions(-)