linux-kernel - Re: [PATCH v2 3/3] perf report: Implement visual marker for macro fusion in annotate

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <f4b0a69a-b0e6-efa0-ddcf-4ba37d7e34d0@linux.intel.com>
Date:   Tue, 20 Jun 2017 09:54:36 +0800
From:   "Jin, Yao" <yao.jin@...ux.intel.com>
To:     Arnaldo Carvalho de Melo <acme@...nel.org>
Cc:     Jiri Olsa <jolsa@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>, mingo@...radead.org,
        alexander.shishkin@...ux.intel.com, linux-kernel@...r.kernel.org,
        ak@...ux.intel.com, kan.liang@...el.com, yao.jin@...el.com
Subject: Re: [PATCH v2 3/3] perf report: Implement visual marker for macro
 fusion in annotate


>> Reference for macro fusion is the optimization guide,
>> http://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-optimization-manual.html
>> 2.3.2.1
>> — In Intel microarchitecture code name Nehalem: CMP, TEST.
>> — In Intel microarchitecture code name Sandy Bridge: CMP, TEST, ADD, SUB,
>> AND, INC, DEC
>> — These instructions can fuse if The first source / destination operand is a
>> register.
>>
>> The second source operand (if exists) is one of: immediate, register, or non
>> RIP-relative memory.
>> The second instruction of the macro-fusable pair is a conditional branch.
>>
>> We probably don't need the full rules, just a simple test for
>> CMP/TEST/ADD/SUB/AND/INC/DEC and second instruction a Jcc condition branch.
>> Also I don't think we need to distinguish Nehalem/Sandy Bridge and other
>> core platforms. A simple test may be acceptable.
> Humm, then we need to make sure somehow that this may or may not be
> happening, with the above rules and optimization guide URL and pages
> mentioned in the documentation.
>
> I think that as we improve the disassembler, the more precise we can go
> the better. If we know that the machine is x86 _and_ Nehalem, then we
> should do this fusing visual cue onlyu for CMP and TEST, etc.
>
> - Arnaldo
>   

I will add checking for Nehalem (CMP, TEST). For other newer Intel CPUs 
just check it by default (CMP, TEST, ADD, SUB, AND, INC, DEC).

Thanks
Jin Yao