linux-kernel - RE: [Intel-gfx] [PATCH v9 3/7] drm: Extend the drm format

Open Source and information security mailing list archives

Message-ID: <237F54289DF84E4997F34151298ABEBC7C56EC31@SHSMSX101.ccr.corp.intel.com>
Date:   Tue, 20 Jun 2017 09:01:59 +0000
From:   "Zhang, Tina" <tina.zhang@...el.com>
To:     Ville Syrjälä <ville.syrjala@...ux.intel.com>,
        "Chen, Xiaoguang" <xiaoguang.chen@...el.com>
CC:     "intel-gfx@...ts.freedesktop.org" <intel-gfx@...ts.freedesktop.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "kraxel@...hat.com" <kraxel@...hat.com>,
        "intel-gvt-dev@...ts.freedesktop.org" 
        <intel-gvt-dev@...ts.freedesktop.org>,
        "Lv, Zhiyuan" <zhiyuan.lv@...el.com>,
        "Wang, Zhi A" <zhi.a.wang@...el.com>,
        "Wang, Zhenyu Z" <zhenyu.z.wang@...el.com>
Subject: RE: [Intel-gfx] [PATCH v9 3/7] drm: Extend the drm format


> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces@...ts.freedesktop.org] On Behalf Of
> Ville Syrjälä
> Sent: Thursday, June 15, 2017 6:22 PM
> To: Chen, Xiaoguang <xiaoguang.chen@...el.com>
> Cc: intel-gfx@...ts.freedesktop.org; linux-kernel@...r.kernel.org;
> kraxel@...hat.com; intel-gvt-dev@...ts.freedesktop.org; Lv, Zhiyuan
> <zhiyuan.lv@...el.com>
> Subject: Re: [Intel-gfx] [PATCH v9 3/7] drm: Extend the drm format
> 
> On Thu, Jun 15, 2017 at 04:00:07PM +0800, Xiaoguang Chen wrote:
> > Add new drm format which will be used by GVT-g.
> >
> > Signed-off-by: Xiaoguang Chen <xiaoguang.chen@...el.com>
> > ---
> >  include/uapi/drm/drm_fourcc.h | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/include/uapi/drm/drm_fourcc.h
> > b/include/uapi/drm/drm_fourcc.h index 55e3010..2681862 100644
> > --- a/include/uapi/drm/drm_fourcc.h
> > +++ b/include/uapi/drm/drm_fourcc.h
> > @@ -113,6 +113,10 @@ extern "C" {
> >
> >  #define DRM_FORMAT_AYUV		fourcc_code('A', 'Y', 'U', 'V') /* [31:0]
> A:Y:Cb:Cr 8:8:8:8 little endian */
> >
> > +/* 64 bpp RGB */
> > +#define DRM_FORMAT_XRGB161616  fourcc_code('X', 'R', '4', '8') /*
> > +[63:0] x:R:G:B 16:16:16:16 little endian */ #define
> > +DRM_FORMAT_XBGR161616  fourcc_code('X', 'B', '4', '8') /* [63:0]
> > +x:B:G:R 16:16:16:16 little endian */
> 
> Are these supposed to be the half float formats? If so the docs are lacking. Also
> this sort of stuff must be sent to dri-devel for everyone to see.
> 
> That said, I don't really like having them in any gvt code until they're handled by
> the driver proper.
This is needed by some Apps running on Windows VM. These can be separated to another patch set where more can be included, e.g. docs.
Thanks.

> 
> > +
> >  /*
> >   * 2 plane RGB + A
> >   * index 0 = RGB plane, same format as the corresponding non _A8
> > format has
> > --
> > 2.7.4
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@...ts.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> --
> Ville Syrjälä
> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@...ts.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives