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Message-ID: <CAAST=9zepWJijea5Fy26D7XKifeJw94X-1TiMFDOr+Um1_5hAw@mail.gmail.com>
Date: Thu, 22 Jun 2017 13:44:07 +0800
From: Ziping Chen <techping.chan@...il.com>
To: Maxime Ripard <maxime.ripard@...e-electrons.com>
Cc: Chen-Yu Tsai <wens@...e.org>, robh+dt@...nel.org,
mark.rutland@....com, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-sunxi@...glegroups.com
Subject: Re: [PATCH v2 1/3] input: sun4i-a10-lradc-keys: Add support for A83T
2017-06-22 4:35 GMT+08:00 Maxime Ripard <maxime.ripard@...e-electrons.com>:
> On Tue, Jun 20, 2017 at 09:44:43PM +0800, Ziping Chen wrote:
>> From: Ziping Chen <techping.chan@...il.com>
>>
>> Allwinner A83T SoC has a low res adc like the one
>> in Allwinner A10 SoC, however, the A10 SoC's vref
>> of lradc internally is divided by 2/3 and the A83T
>> SoC's isn't, thus add a hardware variant for it to
>> be compatible with various devices.
>
> Where did you get that info from?
>
> Judging from the user manual, the threshold is actually set to 3/4,
> and not 2/3, but there's still one.
In the top of page 266 of the A10 User Manual V1.50, it said "2/3
ADC_REF (Level A)" which mean Level A is 2/3 of the vref.
In the bottom of page 230 of the A83T User Manual V1.5.1, it said
"1.35V (Level A)" meaning that Level A is 1.35V. Oh, it's my fault...
It's 3/4 of the vref (A83T's ADC_REF is fixed at 1.8V).
So... i will change r_lradc_variant_a83t.divisor_numerator to 3 and
r_lradc_variant_a83t.divisor_denominator to 4...
Is there any other problems?
Thanks,
Ziping
>
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
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