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Message-Id: <20170622122608.80435-1-kirill.shutemov@linux.intel.com>
Date: Thu, 22 Jun 2017 15:26:03 +0300
From: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
To: Linus Torvalds <torvalds@...ux-foundation.org>,
Andrew Morton <akpm@...ux-foundation.org>, x86@...nel.org,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
"H. Peter Anvin" <hpa@...or.com>
Cc: Andi Kleen <ak@...ux.intel.com>,
Dave Hansen <dave.hansen@...el.com>,
Andy Lutomirski <luto@...capital.net>,
linux-arch@...r.kernel.org, linux-mm@...ck.org,
linux-kernel@...r.kernel.org,
"Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Subject: [PATCH 0/5] Last bits for initial 5-level paging enabling
As Ingo requested I've split and updated last two patches for my previous
patchset.
Please review and consider applying.
Kirill A. Shutemov (5):
x86: Enable 5-level paging support
x86/mm: Rename tasksize_32bit/64bit to task_size_32bit/64bit
x86/mpx: Do not allow MPX if we have mappings above 47-bit
x86/mm: Prepare to expose larger address space to userspace
x86/mm: Allow userspace have mapping above 47-bit
Documentation/x86/x86_64/5level-paging.txt | 64 ++++++++++++++++++++++++++++++
arch/x86/Kconfig | 18 +++++++++
arch/x86/include/asm/elf.h | 6 +--
arch/x86/include/asm/mpx.h | 9 +++++
arch/x86/include/asm/processor.h | 12 ++++--
arch/x86/kernel/sys_x86_64.c | 30 ++++++++++++--
arch/x86/mm/hugetlbpage.c | 27 +++++++++++--
arch/x86/mm/mmap.c | 12 +++---
arch/x86/mm/mpx.c | 33 ++++++++++++++-
arch/x86/xen/Kconfig | 3 ++
10 files changed, 193 insertions(+), 21 deletions(-)
create mode 100644 Documentation/x86/x86_64/5level-paging.txt
--
2.11.0
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